From patchwork Mon Mar 26 21:27:15 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Thomas Petazzoni X-Patchwork-Id: 10308777 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id A430C60212 for ; Mon, 26 Mar 2018 21:27:31 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 9C1F921327 for ; Mon, 26 Mar 2018 21:27:31 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 9084A298A4; Mon, 26 Mar 2018 21:27:31 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 320A9298BC for ; Mon, 26 Mar 2018 21:27:31 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752004AbeCZV1a (ORCPT ); Mon, 26 Mar 2018 17:27:30 -0400 Received: from mail.bootlin.com ([62.4.15.54]:56305 "EHLO mail.bootlin.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752026AbeCZV1a (ORCPT ); Mon, 26 Mar 2018 17:27:30 -0400 Received: by mail.bootlin.com (Postfix, from userid 110) id 2104820879; Mon, 26 Mar 2018 23:27:28 +0200 (CEST) Received: from localhost (LFbn-TOU-1-408-85.w86-206.abo.wanadoo.fr [86.206.234.85]) by mail.bootlin.com (Postfix) with ESMTPSA id BAC2120884; Mon, 26 Mar 2018 23:27:17 +0200 (CEST) From: Thomas Petazzoni To: Yoshinori Sato , Rich Felker , linux-sh@vger.kernel.org Cc: Thomas Petazzoni Subject: [PATCH 2/2] arch/sh: enable L2 cache on SH7786 Date: Mon, 26 Mar 2018 23:27:15 +0200 Message-Id: <20180326212715.12907-3-thomas.petazzoni@bootlin.com> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180326212715.12907-1-thomas.petazzoni@bootlin.com> References: <20180326212715.12907-1-thomas.petazzoni@bootlin.com> Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP This brings a significant performance improvement in some specific scenarios, so let's enable the L2 cache. Signed-off-by: Thomas Petazzoni --- arch/sh/include/cpu-sh4/cpu/cache.h | 2 ++ arch/sh/kernel/cpu/sh4a/setup-sh7786.c | 7 +++++++ 2 files changed, 9 insertions(+) diff --git a/arch/sh/include/cpu-sh4/cpu/cache.h b/arch/sh/include/cpu-sh4/cpu/cache.h index 92c4cd119b66..6765e18ac6a5 100644 --- a/arch/sh/include/cpu-sh4/cpu/cache.h +++ b/arch/sh/include/cpu-sh4/cpu/cache.h @@ -22,10 +22,12 @@ #define CCR_CACHE_WT 0x0002 /* Write-Through (for P0,U0,P3) (else writeback)*/ #define CCR_CACHE_CB 0x0004 /* Copy-Back (for P1) (else writethrough) */ #define CCR_CACHE_OCI 0x0008 /* OC Invalidate */ +#define CCR_CACHE_L2OE 0x0010 /* Operand Secondary Cache Enable */ #define CCR_CACHE_ORA 0x0020 /* OC RAM Mode */ #define CCR_CACHE_OIX 0x0080 /* OC Index Enable */ #define CCR_CACHE_ICE 0x0100 /* Instruction Cache Enable */ #define CCR_CACHE_ICI 0x0800 /* IC Invalidate */ +#define CCR_CACHE_L2IE 0x1000 /* Instruction Secondary Cache Enable */ #define CCR_CACHE_IIX 0x8000 /* IC Index Enable */ #ifndef CONFIG_CPU_SH4A #define CCR_CACHE_EMODE 0x80000000 /* EMODE Enable */ diff --git a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c index 17aac38a6e90..63fb246e23a9 100644 --- a/arch/sh/kernel/cpu/sh4a/setup-sh7786.c +++ b/arch/sh/kernel/cpu/sh4a/setup-sh7786.c @@ -27,6 +27,8 @@ #include #include +#include + static struct plat_sci_port scif0_platform_data = { .scscr = SCSCR_REIE | SCSCR_CKE1, .type = PORT_SCIF, @@ -840,3 +842,8 @@ void __init plat_early_device_setup(void) early_platform_add_devices(sh7786_early_devices, ARRAY_SIZE(sh7786_early_devices)); } + +int l2_cache_init(void) +{ + return CCR_CACHE_L2OE | CCR_CACHE_L2IE; +}