From patchwork Thu Dec 25 22:55:26 2014 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Sergei Shtylyov X-Patchwork-Id: 5542021 X-Patchwork-Delegate: geert@linux-m68k.org Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EE92E9F326 for ; Thu, 25 Dec 2014 22:55:34 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id F27CD20114 for ; Thu, 25 Dec 2014 22:55:33 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id E787720131 for ; Thu, 25 Dec 2014 22:55:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751877AbaLYWzc (ORCPT ); Thu, 25 Dec 2014 17:55:32 -0500 Received: from mail-lb0-f172.google.com ([209.85.217.172]:41339 "EHLO mail-lb0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751786AbaLYWzb (ORCPT ); Thu, 25 Dec 2014 17:55:31 -0500 Received: by mail-lb0-f172.google.com with SMTP id z12so149179lbi.3 for ; Thu, 25 Dec 2014 14:55:29 -0800 (PST) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:organization :user-agent:mime-version:content-transfer-encoding:content-type; bh=AQFYKMufJIRzRNEoXhnsHuXIk9EblDt9CaQXJsyKfTk=; b=Fgf82lkWGPYv06MSiz2ajEXnUCB9StIIVjRALzOwR3Cd/cYbDOjzo532zdVEVVlWxS jFmUrAd+gl9buhjtX9rLsR8w2sQ+ddg3cLlvFqwVDBF3CIpVpv7Hh4oXxHqsfajJvmP0 e/b9a+A5D6MP6ld6XT6awft/vdtISmMg2jciPC1mHlwtEBhiHaWV/ShfMDqzijsrXEAV FEdqdqx4Or0P1d3jpS6j6Shs2FebiIpMDqEqpElM/Sci6kWnFqaD/u+1++/cjMujeaLs DwYzch57vHJT/51i18tD1K/8NSvfGGDRFmguUEV8aQ7J7XSITGEpelw3i14iBq1MapPF UGeQ== X-Gm-Message-State: ALoCoQmQaLQR1LB6OaQ3t6oFkvmp318JS4UaI5Gb7vcxesFjwq0kwpYCG55Hgb5arpeV/au+iMMn X-Received: by 10.112.52.229 with SMTP id w5mr28161835lbo.52.1419548129265; Thu, 25 Dec 2014 14:55:29 -0800 (PST) Received: from wasted.cogentembedded.com (ppp21-253.pppoe.mtu-net.ru. [81.195.21.253]) by mx.google.com with ESMTPSA id jq14sm7576686lab.14.2014.12.25.14.55.27 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 25 Dec 2014 14:55:28 -0800 (PST) From: Sergei Shtylyov To: mturquette@linaro.org, linux-kernel@vger.kernel.org, sboyd@codeaurora.org, robh+dt@kernel.org Cc: linux-sh@vger.kernel.org, pawel.moll@arm.com, ijc+devicetree@hellion.org.uk, galak@codeaurora.org, devicetree@vger.kernel.org Subject: [PATCH] clk-rcar-gen2: ADSP clock support Date: Fri, 26 Dec 2014 01:55:26 +0300 Message-ID: <2616097.6QI9oiZ0Bl@wasted.cogentembedded.com> Organization: Cogent Embedded Inc. User-Agent: KMail/4.14.3 (Linux/3.17.7-200.fc20.x86_64; KDE/4.14.3; x86_64; ; ) MIME-Version: 1.0 Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-6.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_HI, T_RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add the ADSP clock support to the R-Car generation 2 CPG driver. This clock gets derived from PLL1. The layout of the ADSPCKCR register is similar to those of the clocks supported by the 'clk-div6' driver but the divider encoding is non-linear, so can't be supported by that driver... Based on the original patch by Konstantin Kozhevnikov . Signed-off-by: Sergei Shtylyov --- The patch is against the 'clk-next' branch of Mike Turquette's 'linux.git' repo plus the RCAN clock support posted yesterday. Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt | 5 - drivers/clk/shmobile/clk-rcar-gen2.c | 48 ++++++++++ 2 files changed, 51 insertions(+), 2 deletions(-) -- To unsubscribe from this list: send the line "unsubscribe linux-sh" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Index: linux/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt =================================================================== --- linux.orig/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt +++ linux/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt @@ -16,7 +16,8 @@ Required Properties: - clocks: Reference to the parent clock - #clock-cells: Must be 1 - clock-output-names: The names of the clocks. Supported clocks are "main", - "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "sd1", "z", and "rcan" + "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "sd1", "z", "adsp", and + "rcan" Example @@ -30,5 +31,5 @@ Example #clock-cells = <1>; clock-output-names = "main", "pll0, "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "sd1", "z", - "rcan"; + "adsp", "rcan"; }; Index: linux/drivers/clk/shmobile/clk-rcar-gen2.c =================================================================== --- linux.orig/drivers/clk/shmobile/clk-rcar-gen2.c +++ linux/drivers/clk/shmobile/clk-rcar-gen2.c @@ -33,6 +33,7 @@ struct rcar_gen2_cpg { #define CPG_FRQCRC 0x000000e0 #define CPG_FRQCRC_ZFC_MASK (0x1f << 8) #define CPG_FRQCRC_ZFC_SHIFT 8 +#define CPG_ADSPCKCR 0x0000025c #define CPG_RCANCKCR 0x00000270 /* ----------------------------------------------------------------------------- @@ -162,6 +163,51 @@ static struct clk * __init cpg_z_clk_reg return clk; } +/* ADSP divisors */ +static const struct clk_div_table cpg_adsp_div_table[] = { + { 1, 3 }, { 2, 4 }, { 3, 6 }, { 4, 8 }, + { 5, 12 }, { 6, 16 }, { 7, 18 }, { 8, 24 }, + { 10, 36 }, { 11, 48 }, { 0, 0 }, +}; + +static struct clk * __init cpg_adsp_clk_register(struct rcar_gen2_cpg *cpg) +{ + const char *parent_name = "pll1"; + struct clk_divider *div; + struct clk_gate *gate; + struct clk *clk; + + div = kzalloc(sizeof(*div), GFP_KERNEL); + if (!div) + return ERR_PTR(-ENOMEM); + + div->reg = cpg->reg + CPG_ADSPCKCR; + div->width = 4; + div->table = cpg_adsp_div_table; + div->lock = &cpg->lock; + + gate = kzalloc(sizeof(*gate), GFP_KERNEL); + if (!gate) { + kfree(div); + return ERR_PTR(-ENOMEM); + } + + gate->reg = cpg->reg + CPG_RCANCKCR; + gate->bit_idx = 8; + gate->flags = CLK_GATE_SET_TO_DISABLE; + gate->lock = &cpg->lock; + + clk = clk_register_composite(NULL, "adsp", &parent_name, 1, NULL, NULL, + &div->hw, &clk_divider_ops, + &gate->hw, &clk_gate_ops, 0); + if (IS_ERR(clk)) { + kfree(gate); + kfree(div); + } + + return clk; +} + static struct clk * __init cpg_rcan_clk_register(struct rcar_gen2_cpg *cpg, struct device_node *np) { @@ -301,6 +347,8 @@ rcar_gen2_cpg_register_clock(struct devi shift = 0; } else if (!strcmp(name, "z")) { return cpg_z_clk_register(cpg); + } else if (!strcmp(name, "adsp")) { + return cpg_adsp_clk_register(cpg); } else if (!strcmp(name, "rcan")) { return cpg_rcan_clk_register(cpg, np); } else {