From patchwork Fri Nov 20 01:05:45 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 7663151 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 3EB2F9F392 for ; Fri, 20 Nov 2015 01:06:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 3C47420396 for ; Fri, 20 Nov 2015 01:06:19 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 19A9B20437 for ; Fri, 20 Nov 2015 01:06:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754766AbbKTBGR (ORCPT ); Thu, 19 Nov 2015 20:06:17 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:45558 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161811AbbKTBGR (ORCPT ); Thu, 19 Nov 2015 20:06:17 -0500 Received: from penelope.kanocho.kobe.vergenet.net (50-206-118-3-static.hfc.comcastbusiness.net [50.206.118.3]) by kirsty.vergenet.net (Postfix) with ESMTPSA id 0E74A25BEAF; Fri, 20 Nov 2015 12:05:53 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1447981553; bh=cx6a7BPQFBj8ejCsTfE5vFTehNstaZ+mbhYKFaDNolQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=WVAxL9ApmnphAs7mwwIwZ6Id8leNGd6x+39ZKOgxMdK4nhY4YTcPzrVEkVbRj4Pvh +xyGnc+uOGKCN+ITEFhNz64cZCl5ZX3JhcTgrEGybGrZPK36EOaBYZzK2eb1zttiq9 Lh/4lQL0waoMNGNyF1lf6C/1qPwfCPb1ZWogNaLE= Received: by penelope.kanocho.kobe.vergenet.net (Postfix, from userid 7100) id 527AB61B29; Thu, 19 Nov 2015 17:05:51 -0800 (PST) From: Simon Horman To: linux-sh@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Simon Horman , Gaku Inami , Kuninori Morimoto , Magnus Damm Subject: [PATCH 1/6] arm64: renesas: r8a7795: Add Renesas R8A7795 SoC support Date: Thu, 19 Nov 2015 17:05:45 -0800 Message-Id: <26a7e06dfee97b3fb1a4491d55831de7ef4723fd.1447980335.git.horms+renesas@verge.net.au> X-Mailer: git-send-email 2.1.4 In-Reply-To: References: Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Initial version of Renesas R-Car H3 support (V10) Signed-off-by: Gaku Inami Signed-off-by: Kuninori Morimoto Signed-off-by: Magnus Damm Signed-off-by: Simon Horman Acked-by: Geert Uytterhoeven --- Documentation/devicetree/bindings/arm/shmobile.txt | 2 + arch/arm64/Kconfig.platforms | 17 +++++ arch/arm64/boot/dts/Makefile | 1 + arch/arm64/boot/dts/renesas/Makefile | 2 + arch/arm64/boot/dts/renesas/r8a7795.dtsi | 83 ++++++++++++++++++++++ 5 files changed, 105 insertions(+) create mode 100644 arch/arm64/boot/dts/renesas/Makefile create mode 100644 arch/arm64/boot/dts/renesas/r8a7795.dtsi diff --git a/Documentation/devicetree/bindings/arm/shmobile.txt b/Documentation/devicetree/bindings/arm/shmobile.txt index 40bb9007cd0d..6712ebbe5f49 100644 --- a/Documentation/devicetree/bindings/arm/shmobile.txt +++ b/Documentation/devicetree/bindings/arm/shmobile.txt @@ -27,6 +27,8 @@ SoCs: compatible = "renesas,r8a7793" - R-Car E2 (R8A77940) compatible = "renesas,r8a7794" + - R-Car H3 (R8A77950) + compatible = "renesas,r8a7795" Boards: diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 4043c35962cc..8446f27b18df 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -67,6 +67,23 @@ config ARCH_SEATTLE help This enables support for AMD Seattle SOC Family +config ARCH_SHMOBILE + bool + +config ARCH_RENESAS + bool "Renesas SoC Platforms" + select ARCH_SHMOBILE + select PINCTRL + select PM_GENERIC_DOMAINS if PM + help + This enables support for the ARMv8 based Renesas SoCs. + +config ARCH_R8A7795 + bool "Renesas R-Car H3 SoC Platform" + depends on ARCH_RENESAS + help + This enables support for the Renesas R-Car H3 SoC. + config ARCH_STRATIX10 bool "Altera's Stratix 10 SoCFPGA Family" help diff --git a/arch/arm64/boot/dts/Makefile b/arch/arm64/boot/dts/Makefile index eb3c42d97175..0e775e4d6a00 100644 --- a/arch/arm64/boot/dts/Makefile +++ b/arch/arm64/boot/dts/Makefile @@ -10,6 +10,7 @@ dts-dirs += hisilicon dts-dirs += marvell dts-dirs += mediatek dts-dirs += qcom +dts-dirs += renesas dts-dirs += rockchip dts-dirs += sprd dts-dirs += xilinx diff --git a/arch/arm64/boot/dts/renesas/Makefile b/arch/arm64/boot/dts/renesas/Makefile new file mode 100644 index 000000000000..fec69f46d65b --- /dev/null +++ b/arch/arm64/boot/dts/renesas/Makefile @@ -0,0 +1,2 @@ +always := $(dtb-y) +clean-files := *.dtb diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi b/arch/arm64/boot/dts/renesas/r8a7795.dtsi new file mode 100644 index 000000000000..8d7552020daf --- /dev/null +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi @@ -0,0 +1,83 @@ +/* + * Device Tree Source for the r8a7795 SoC + * + * Copyright (C) 2015 Renesas Electronics Corp. + * + * This file is licensed under the terms of the GNU General Public License + * version 2. This program is licensed "as is" without any warranty of any + * kind, whether express or implied. + */ + +#include + +/ { + compatible = "renesas,r8a7795"; + #address-cells = <2>; + #size-cells = <2>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + /* 1 core only at this point */ + a57_0: cpu@0 { + compatible = "arm,cortex-a57", "arm,armv8"; + reg = <0x0>; + device_type = "cpu"; + }; + }; + + extal_clk: extal { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + extalr_clk: extalr { + compatible = "fixed-clock"; + #clock-cells = <0>; + /* This value must be overridden by the board */ + clock-frequency = <0>; + }; + + soc { + compatible = "simple-bus"; + interrupt-parent = <&gic>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + + gic: interrupt-controller@0xf1010000 { + compatible = "arm,gic-400"; + #interrupt-cells = <3>; + #address-cells = <0>; + interrupt-controller; + reg = <0x0 0xf1010000 0 0x1000>, + <0x0 0xf1020000 0 0x2000>; + interrupts = ; + }; + + timer { + compatible = "arm,armv8-timer"; + interrupts = , + , + , + ; + }; + + cpg: clock-controller@e6150000 { + compatible = "renesas,r8a7795-cpg-mssr"; + reg = <0 0xe6150000 0 0x1000>; + clocks = <&extal_clk>, <&extalr_clk>; + clock-names = "extal", "extalr"; + #clock-cells = <2>; + #power-domain-cells = <0>; + }; + }; +};