From patchwork Thu Apr 7 15:01:53 2016 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rich Felker X-Patchwork-Id: 8975521 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 90C1C9F1D3 for ; Thu, 28 Apr 2016 21:59:07 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id A9ACE200C6 for ; Thu, 28 Apr 2016 21:59:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C8347200E5 for ; Thu, 28 Apr 2016 21:59:05 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751534AbcD1V7B (ORCPT ); Thu, 28 Apr 2016 17:59:01 -0400 Received: from 216-12-86-13.cv.mvl.ntelos.net ([216.12.86.13]:57858 "EHLO brightrain.aerifal.cx" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752654AbcD1V67 (ORCPT ); Thu, 28 Apr 2016 17:58:59 -0400 Received: from dalias by brightrain.aerifal.cx with local (Exim 3.15 #2) id 1avtxZ-00080C-00; Thu, 28 Apr 2016 21:58:57 +0000 Message-Id: <3784a31c12dc9c23c5c497786f503e1acafe64dd.1461880061.git.dalias@libc.org> In-Reply-To: References: From: Rich Felker Date: Thu, 7 Apr 2016 15:01:53 +0000 Subject: [PATCH 7/7] sh: add device tree source for J2 FPGA on Mimas v2 board To: linux-sh@vger.kernel.org Cc: Yoshinori Sato Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-4.5 required=5.0 tests=BAYES_00, DATE_IN_PAST_96_XX, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Signed-off-by: Rich Felker --- arch/sh/boot/dts/j2_mimas_v2.dts | 98 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 98 insertions(+) create mode 100755 arch/sh/boot/dts/j2_mimas_v2.dts diff --git a/arch/sh/boot/dts/j2_mimas_v2.dts b/arch/sh/boot/dts/j2_mimas_v2.dts new file mode 100755 index 0000000..0d509f9 --- /dev/null +++ b/arch/sh/boot/dts/j2_mimas_v2.dts @@ -0,0 +1,98 @@ +/dts-v1/; + +/ { + compatible = "jcore,j2-soc"; + model = "J2 FPGA SoC on Mimas v2 board"; + + #address-cells = <1>; + #size-cells = <1>; + + interrupt-parent = <&aic>; + + cpus { + #address-cells = <1>; + #size-cells = <0>; + + cpu@0 { + device_type = "cpu"; + compatible = "jcore,j2"; + reg = < 0 >; + clock-frequency = < 50000000 >; + }; + }; + + memory@10000000 { + device_type = "memory"; + reg = < 0x10000000 0x4000000 >; + }; + + chosen { + stdout-path = "/soc@abcd0000/serial@100"; + }; + + soc@abcd0000 { + compatible = "simple-bus"; + ranges = <0 0xabcd0000 0x100000>; + + #address-cells = <1>; + #size-cells = <1>; + + aic: interrupt-controller { + compatible = "jcore,aic1"; + reg = < 0x200 0x10 >; + cpu-offset = < 0x300 >; + interrupt-controller; + #interrupt-cells = <1>; + }; + + cache-controller { + compatible = "jcore,cache"; + reg = < 0xc0 4 >; + cpu-offset = < 4 >; + }; + + timer { + compatible = "jcore,pit"; + reg = < 0x200 0x30 >; + cpu-offset = < 0x300 >; + interrupts = < 0x48 >; + }; + + ethernet { + compatible = "jcore,emac"; + reg = < 0x10000 0x2000 >; + //interrupts = < 0x60 >; + interrupts = < 0x11 >; + }; + + spi { + compatible = "jcore,spi2"; + + #address-cells = <1>; + #size-cells = <0>; + + spi-max-frequency = <12500000>; + + reg = < 0x40 0x8 >; + + sdcard@1 { + compatible = "mmc-spi-slot"; + reg = <0>; + spi-max-frequency = <12500000>; + voltage-ranges = <3200 3400>; + mode = <0>; + }; + }; + + serial@100 { + clock-frequency = <125000000>; + compatible = "jcore,uartlite", "xlnx,xps-uartlite-1.00.a"; + current-speed = <115200>; + device_type = "serial"; + //interrupts = < 0x5d >; + interrupts = < 0x12 >; + port-number = <0>; + reg = < 0x100 0x10 >; + }; + }; +};