From patchwork Tue Feb 15 11:47:27 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Yoshihiro Shimoda X-Patchwork-Id: 558671 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p1FBm6ZP006719 for ; Tue, 15 Feb 2011 11:48:07 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1754438Ab1BOLrk (ORCPT ); Tue, 15 Feb 2011 06:47:40 -0500 Received: from relmlor1.renesas.com ([210.160.252.171]:44564 "EHLO relmlor1.renesas.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754690Ab1BOLrb (ORCPT ); Tue, 15 Feb 2011 06:47:31 -0500 Received: from relmlir4.idc.renesas.com ([10.200.68.154]) by relmlor1.idc.renesas.com ( SJSMS) with ESMTP id <0LGN00K2SQ33OJF0@relmlor1.idc.renesas.com>; Tue, 15 Feb 2011 20:47:27 +0900 (JST) Received: from relmlac1.idc.renesas.com ([10.200.69.21]) by relmlir4.idc.renesas.com ( SJSMS) with ESMTP id <0LGN00F9QQ33WU30@relmlir4.idc.renesas.com>; Tue, 15 Feb 2011 20:47:27 +0900 (JST) Received: by relmlac1.idc.renesas.com (Postfix, from userid 0) id ADB8880088; Tue, 15 Feb 2011 20:47:27 +0900 (JST) Received: from relmlac1.idc.renesas.com (localhost [127.0.0.1]) by relmlac1.idc.renesas.com (Postfix) with ESMTP id A7F3D80030; Tue, 15 Feb 2011 20:47:27 +0900 (JST) Received: from relmlii1.idc.renesas.com [10.200.68.65] by relmlac1.idc.renesas.com with ESMTP id WAB07104; Tue, 15 Feb 2011 20:47:27 +0900 X-IronPort-AV: E=Sophos; i="4.60,473,1291561200"; d="scan'208"; a="11531359" Received: from unknown (HELO [172.30.8.157]) ([172.30.8.157]) by relmlii1.idc.renesas.com with ESMTP; Tue, 15 Feb 2011 20:47:27 +0900 Message-id: <4D5A67CF.3040406@renesas.com> Date: Tue, 15 Feb 2011 20:47:27 +0900 From: Yoshihiro Shimoda User-Agent: Mozilla/5.0 (Windows; U; Windows NT 5.1; ja; rv:1.9.2.13) Gecko/20101207 Thunderbird/3.1.7 MIME-version: 1.0 To: netdev@vger.kernel.org Cc: SH-Linux Subject: [RFC, PATCH 2/4] net: sh_eth: remove the SH_TSU_ADDR Content-type: text/plain; charset=ISO-8859-1 Content-transfer-encoding: 7bit Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 15 Feb 2011 11:48:07 +0000 (UTC) diff --git a/drivers/net/sh_eth.c b/drivers/net/sh_eth.c index 3b6d545..0593f29 100644 --- a/drivers/net/sh_eth.c +++ b/drivers/net/sh_eth.c @@ -1446,7 +1446,7 @@ static const struct net_device_ops sh_eth_netdev_ops = { static int sh_eth_drv_probe(struct platform_device *pdev) { int ret, devno = 0; - struct resource *res; + struct resource *res, *res_tsu; struct net_device *ndev = NULL; struct sh_eth_private *mdp; struct sh_eth_plat_data *pd; @@ -1520,9 +1520,13 @@ static int sh_eth_drv_probe(struct platform_device *pdev) mdp->cd->chip_reset(ndev); #if defined(SH_ETH_HAS_TSU) - /* TSU init (Init only)*/ - mdp->tsu_addr = SH_TSU_ADDR; - sh_eth_tsu_init(mdp); + res_tsu = platform_get_resource(pdev, IORESOURCE_MEM, 1); + if (res_tsu) { + mdp->tsu_addr = ioremap(res_tsu->start, + resource_size(res_tsu)); + /* TSU init (Init only)*/ + sh_eth_tsu_init(mdp); + } #endif } @@ -1549,6 +1553,8 @@ out_unregister: out_release: /* net_dev free */ + if (mdp->tsu_addr) + iounmap(mdp->tsu_addr); if (ndev) free_netdev(ndev); @@ -1559,7 +1565,9 @@ out: static int sh_eth_drv_remove(struct platform_device *pdev) { struct net_device *ndev = platform_get_drvdata(pdev); + struct sh_eth_private *mdp = netdev_priv(ndev); + iounmap(mdp->tsu_addr); sh_mdio_release(ndev); unregister_netdev(ndev); pm_runtime_disable(&pdev->dev); diff --git a/drivers/net/sh_eth.h b/drivers/net/sh_eth.h index 1510a7c..1a32dc0 100644 --- a/drivers/net/sh_eth.h +++ b/drivers/net/sh_eth.h @@ -371,21 +371,6 @@ static const u16 sh_eth_offset_fast_sh3_sh2[SH_ETH_MAX_REGISTER_OFFSET] = { }; -#if defined(CONFIG_CPU_SUBTYPE_SH7763) -/* This CPU register maps is very difference by other SH4 CPU */ -/* Chip Base Address */ -# define SH_TSU_ADDR 0xFEE01800 -# define ARSTR SH_TSU_ADDR -#elif defined(CONFIG_CPU_SH4) /* #if defined(CONFIG_CPU_SUBTYPE_SH7763) */ -#else /* #elif defined(CONFIG_CPU_SH4) */ -/* This section is SH3 or SH2 */ -#ifndef CONFIG_CPU_SUBTYPE_SH7619 -/* Chip base address */ -# define SH_TSU_ADDR 0xA7000804 -# define ARSTR 0xA7000800 -#endif -#endif /* CONFIG_CPU_SUBTYPE_SH7763 */ - /* Driver's parameters */ #if defined(CONFIG_CPU_SH4) #define SH4_SKB_RX_ALIGN 32