| Message ID | 5d796f8d8e27a1c68f4103f9a0d92c84fb0bdda8.1699856600.git.ysato@users.sourceforge.jp (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Device Tree support for SH7751 based board | expand |
On 14/11/2023 08:59, Yoshinori Sato wrote: > Renesas SH7751 Interrupt controller priority register define. > > Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> > --- I never received any answer to my comments and I do not see all of them addressed. I don't understand exactly why... old patches were called RFC, but this one is not. No one likes to repeat himself, so I will just ask - please implement entire feedback from all previous revisions. Including the missing testing (proper get_maintainers.pl). Otherwise it will be a string NAK. > .../dt-bindings/interrupt-controller/sh_intc.h | 16 ++++++++++++++++ > 1 file changed, 16 insertions(+) > create mode 100644 include/dt-bindings/interrupt-controller/sh_intc.h > > diff --git a/include/dt-bindings/interrupt-controller/sh_intc.h b/include/dt-bindings/interrupt-controller/sh_intc.h > new file mode 100644 > index 000000000000..b399cd15e1a8 > --- /dev/null > +++ b/include/dt-bindings/interrupt-controller/sh_intc.h Naming based on compatible. > @@ -0,0 +1,16 @@ > +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > + * > + * SH3/4 INTC EVT - IRQ conversion > + */ Missing guards. > + > +#define evt2irq(evt) ((evt) >> 5) > + > +#define IPRA 0 > +#define IPRB 4 > +#define IPRC 8 > +#define IPRD 12 > +#define INTPRI00 256 > +#define IPR_B12 12 > +#define IPR_B8 8 > +#define IPR_B4 4 > +#define IPR_B0 0 That's not a binding and I think we told this. Best regards, Krzysztof
diff --git a/include/dt-bindings/interrupt-controller/sh_intc.h b/include/dt-bindings/interrupt-controller/sh_intc.h new file mode 100644 index 000000000000..b399cd15e1a8 --- /dev/null +++ b/include/dt-bindings/interrupt-controller/sh_intc.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) + * + * SH3/4 INTC EVT - IRQ conversion + */ + +#define evt2irq(evt) ((evt) >> 5) + +#define IPRA 0 +#define IPRB 4 +#define IPRC 8 +#define IPRD 12 +#define INTPRI00 256 +#define IPR_B12 12 +#define IPR_B8 8 +#define IPR_B4 4 +#define IPR_B0 0
Renesas SH7751 Interrupt controller priority register define. Signed-off-by: Yoshinori Sato <ysato@users.sourceforge.jp> --- .../dt-bindings/interrupt-controller/sh_intc.h | 16 ++++++++++++++++ 1 file changed, 16 insertions(+) create mode 100644 include/dt-bindings/interrupt-controller/sh_intc.h