From patchwork Fri Nov 20 01:05:28 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 7663071 X-Patchwork-Delegate: horms@verge.net.au Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id DC37BC05CA for ; Fri, 20 Nov 2015 01:06:09 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 0E2B620460 for ; Fri, 20 Nov 2015 01:06:09 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 1DE2E20437 for ; Fri, 20 Nov 2015 01:06:08 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1161805AbbKTBGH (ORCPT ); Thu, 19 Nov 2015 20:06:07 -0500 Received: from kirsty.vergenet.net ([202.4.237.240]:45558 "EHLO kirsty.vergenet.net" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1161806AbbKTBGH (ORCPT ); Thu, 19 Nov 2015 20:06:07 -0500 Received: from penelope.kanocho.kobe.vergenet.net (50-206-118-3-static.hfc.comcastbusiness.net [50.206.118.3]) by kirsty.vergenet.net (Postfix) with ESMTPSA id A30EC25BE72; Fri, 20 Nov 2015 12:05:44 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=verge.net.au; s=mail; t=1447981544; bh=16PCc22dGC4F1YjMCyUhbtuvzOnYizyp/kqzmD+JHnw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=A9mopnXwDRZeRdhca6mmzZhYQa/awakqVfCYhRI7Mk41lK9GV1xTuGXAwMLMYvqsC PWGDmevt/bQm+2RskqUKDrCSlT6CVbdFLC1apd2li5QJMgJO9RZo5afH05l2AOWFHL LihAr4K0GJFKrsyGhs/61YPgmDoR44ArHFr7Kg1o= Received: by penelope.kanocho.kobe.vergenet.net (Postfix, from userid 7100) id BC21A6622F; Thu, 19 Nov 2015 17:05:38 -0800 (PST) From: Simon Horman To: linux-sh@vger.kernel.org Cc: linux-arm-kernel@lists.infradead.org, Magnus Damm , Magnus Damm , Simon Horman Subject: [PATCH 21/29] ARM: shmobile: r8a7794: alt: Enable VGA port Date: Thu, 19 Nov 2015 17:05:28 -0800 Message-Id: <876e7fb9f418fd86719af345febf8656c47e833c.1447981420.git.horms+renesas@verge.net.au> X-Mailer: git-send-email 2.1.4 In-Reply-To: References: Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-7.3 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Magnus Damm Enable the DU device and the VGA port available on the r8a7794 ALT board. The VGA portion of the ALT board is somewhat similar to the Lager board but in case of ALT the DU1 pins are used and the X2 clock has a reduced frequency. This patch does not include any pinctrl (PFC) settings due to lack of PFC DT integration on r8a7794. At this point the default state of the boot loader is enough to keep the VGA port working without changing any pinctrl settings. Signed-off-by: Magnus Damm Signed-off-by: Simon Horman --- arch/arm/boot/dts/r8a7794-alt.dts | 61 +++++++++++++++++++++++++++++++++++++++ 1 file changed, 61 insertions(+) diff --git a/arch/arm/boot/dts/r8a7794-alt.dts b/arch/arm/boot/dts/r8a7794-alt.dts index 928cfa641475..a548007b9b10 100644 --- a/arch/arm/boot/dts/r8a7794-alt.dts +++ b/arch/arm/boot/dts/r8a7794-alt.dts @@ -33,6 +33,67 @@ #address-cells = <1>; #size-cells = <1>; }; + + vga-encoder { + compatible = "adi,adv7123"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + adv7123_in: endpoint { + remote-endpoint = <&du_out_rgb1>; + }; + }; + port@1 { + reg = <1>; + adv7123_out: endpoint { + remote-endpoint = <&vga_in>; + }; + }; + }; + }; + + vga { + compatible = "vga-connector"; + + port { + vga_in: endpoint { + remote-endpoint = <&adv7123_out>; + }; + }; + }; + + x2_clk: x2-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <74250000>; + }; + + x13_clk: x13-clock { + compatible = "fixed-clock"; + #clock-cells = <0>; + clock-frequency = <148500000>; + }; +}; + +&du { + status = "okay"; + + clocks = <&mstp7_clks R8A7794_CLK_DU0>, + <&mstp7_clks R8A7794_CLK_DU0>, + <&x13_clk>, <&x2_clk>; + clock-names = "du.0", "du.1", "dclkin.0", "dclkin.1"; + + ports { + port@1 { + endpoint { + remote-endpoint = <&adv7123_in>; + }; + }; + }; }; &extal_clk {