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18 Sep 2015 11:03:36 +0900 Received: from HK2PR06MB0593.apcprd06.prod.outlook.com (10.161.187.144) by HK2PR06MB0724.apcprd06.prod.outlook.com (10.162.207.150) with Microsoft SMTP Server (TLS) id 15.1.274.16; Fri, 18 Sep 2015 02:03:35 +0000 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=kuninori.morimoto.gx@renesas.com; Received: from morimoto-PC.renesas.com (211.11.155.144) by HK2PR06MB0593.apcprd06.prod.outlook.com (10.161.187.144) with Microsoft SMTP Server (TLS) id 15.1.268.17; Fri, 18 Sep 2015 02:03:35 +0000 Message-ID: <878u841o94.wl%kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH 03/18 v3] arm64: renesas: r8a7795: add AUDIO_DMAC support User-Agent: Wanderlust/2.15.9 Emacs/24.3 Mule/6.0 MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") To: Simon CC: Magnus , In-Reply-To: <87d1xg1oc7.wl%kuninori.morimoto.gx@renesas.com> References: <87twqs1osz.wl%kuninori.morimoto.gx@renesas.com> <87d1xg1oc7.wl%kuninori.morimoto.gx@renesas.com> Date: Fri, 18 Sep 2015 02:03:35 +0000 X-Originating-IP: [211.11.155.144] X-ClientProxiedBy: TY1PR01CA0020.jpnprd01.prod.outlook.com (25.161.131.158) To HK2PR06MB0593.apcprd06.prod.outlook.com (25.161.187.144) X-Microsoft-Exchange-Diagnostics: 1; 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}; + mstp5_clks: mstp5_clks@e6150144 { + compatible = "renesas,r8a7795-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; + clocks = <&s3d4_clk>, <&s3d4_clk>; + #clock-cells = <1>; + clock-indices = < + R8A7795_CLK_AUDIO_DMAC0 R8A7795_CLK_AUDIO_DMAC1 + >; + }; + mstp6_clks: mstp6@e61501c0 { compatible = "renesas,r8a7795-mstp-clocks", "renesas,cpg-mstp-clocks"; @@ -493,6 +504,70 @@ }; }; + audma0: dma-controller@ec700000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xec700000 0 0x10000>; + interrupts = <0 350 IRQ_TYPE_LEVEL_HIGH + 0 320 IRQ_TYPE_LEVEL_HIGH + 0 321 IRQ_TYPE_LEVEL_HIGH + 0 322 IRQ_TYPE_LEVEL_HIGH + 0 323 IRQ_TYPE_LEVEL_HIGH + 0 324 IRQ_TYPE_LEVEL_HIGH + 0 325 IRQ_TYPE_LEVEL_HIGH + 0 326 IRQ_TYPE_LEVEL_HIGH + 0 327 IRQ_TYPE_LEVEL_HIGH + 0 328 IRQ_TYPE_LEVEL_HIGH + 0 329 IRQ_TYPE_LEVEL_HIGH + 0 330 IRQ_TYPE_LEVEL_HIGH + 0 331 IRQ_TYPE_LEVEL_HIGH + 0 332 IRQ_TYPE_LEVEL_HIGH + 0 333 IRQ_TYPE_LEVEL_HIGH + 0 334 IRQ_TYPE_LEVEL_HIGH + 0 335 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&mstp5_clks R8A7795_CLK_AUDIO_DMAC0>; + power-domains = <&cpg_clocks>; + clock-names = "fck"; + #dma-cells = <1>; + dma-channels = <16>; + }; + + audma1: dma-controller@ec720000 { + compatible = "renesas,rcar-dmac"; + reg = <0 0xec720000 0 0x10000>; + interrupts = <0 351 IRQ_TYPE_LEVEL_HIGH + 0 336 IRQ_TYPE_LEVEL_HIGH + 0 337 IRQ_TYPE_LEVEL_HIGH + 0 338 IRQ_TYPE_LEVEL_HIGH + 0 339 IRQ_TYPE_LEVEL_HIGH + 0 340 IRQ_TYPE_LEVEL_HIGH + 0 341 IRQ_TYPE_LEVEL_HIGH + 0 342 IRQ_TYPE_LEVEL_HIGH + 0 343 IRQ_TYPE_LEVEL_HIGH + 0 344 IRQ_TYPE_LEVEL_HIGH + 0 345 IRQ_TYPE_LEVEL_HIGH + 0 346 IRQ_TYPE_LEVEL_HIGH + 0 347 IRQ_TYPE_LEVEL_HIGH + 0 348 IRQ_TYPE_LEVEL_HIGH + 0 349 IRQ_TYPE_LEVEL_HIGH + 0 382 IRQ_TYPE_LEVEL_HIGH + 0 383 IRQ_TYPE_LEVEL_HIGH>; + interrupt-names = "error", + "ch0", "ch1", "ch2", "ch3", + "ch4", "ch5", "ch6", "ch7", + "ch8", "ch9", "ch10", "ch11", + "ch12", "ch13", "ch14", "ch15"; + clocks = <&mstp5_clks R8A7795_CLK_AUDIO_DMAC1>; + power-domains = <&cpg_clocks>; + clock-names = "fck"; + #dma-cells = <1>; + dma-channels = <16>; + }; + pfc: pfc@e6060000 { compatible = "renesas,pfc-r8a7795"; reg = <0 0xe6060000 0 0x50c>; diff --git a/include/dt-bindings/clock/r8a7795-clock.h b/include/dt-bindings/clock/r8a7795-clock.h index 881788f..ca370c7 100644 --- a/include/dt-bindings/clock/r8a7795-clock.h +++ b/include/dt-bindings/clock/r8a7795-clock.h @@ -32,6 +32,8 @@ #define R8A7795_CLK_SCIF2 10 /* MSTP5 */ +#define R8A7795_CLK_AUDIO_DMAC0 2 +#define R8A7795_CLK_AUDIO_DMAC1 1 /* MSTP6 */ #define R8A7795_CLK_VSPD3 20