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24 Aug 2015 11:28:17 +0900 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=kuninori.morimoto.gx@renesas.com; Received: from morimoto-PC.renesas.com (211.11.155.144) by SG2PR06MB0604.apcprd06.prod.outlook.com (10.161.10.154) with Microsoft SMTP Server (TLS) id 15.1.243.23; Mon, 24 Aug 2015 02:28:16 +0000 Message-ID: <87fv3977aa.wl%kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH 09/25 v7][RFC] arm64: renesas: r8a7795: Add SCIF2 support User-Agent: Wanderlust/2.15.9 Emacs/24.3 Mule/6.0 MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") To: Simon CC: Magnus , , YOSHIYUKI ITO , Hisao Munakata , Yusuke Goda , Yoshihiro Shimoda , TOSHIAKI KOMATSU , Gaku Inami In-Reply-To: <87si7977g4.wl%kuninori.morimoto.gx@renesas.com> References: <87si7977g4.wl%kuninori.morimoto.gx@renesas.com> Date: Mon, 24 Aug 2015 02:28:16 +0000 X-Originating-IP: [211.11.155.144] X-ClientProxiedBy: TY1PR0201CA0006.apcprd02.prod.outlook.com (25.164.90.144) To SG2PR06MB0604.apcprd06.prod.outlook.com (25.161.10.154) X-Microsoft-Exchange-Diagnostics: 1; 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cpg_clocks: cpg_clocks@e6150000 { + #address-cells = <2>; + #size-cells = <2>; + #clock-cells = <1>; + ranges; + compatible = "renesas,r8a7795-cpg-clocks", "renesas,rcar-gen3-cpg-clocks"; reg = <0 0xe6150000 0 0x1000>; clocks = <&extal_clk>; clock-output-names = "main", "pll0", "pll1","pll2", "pll3", "pll4"; + + mstp3_clks: mstp3_clks@e615013c { + compatible = "renesas,r8a7795-mstp-clocks", + "renesas,cpg-mstp-clocks"; + reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>; + clocks = <&s3d4_clk>; + #clock-cells = <1>; + renesas,clock-indices = ; + clock-output-names = "scif2"; + }; }; }; + + scif2: serial@e6e88000 { + compatible = "renesas,scif-r8a7795", "renesas,scif"; + reg = <0 0xe6e88000 0 64>; + interrupts = ; + clocks = <&mstp3_clks R8A7795_CLK_SCIF2>; + clock-names = "sci_ick"; + }; }; }; diff --git a/include/dt-bindings/clock/r8a7795-clock.h b/include/dt-bindings/clock/r8a7795-clock.h index 334fa13..27b3a29 100644 --- a/include/dt-bindings/clock/r8a7795-clock.h +++ b/include/dt-bindings/clock/r8a7795-clock.h @@ -24,6 +24,7 @@ /* MSTP2 */ /* MSTP3 */ +#define R8A7795_CLK_SCIF2 10 /* MSTP5 */