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10 Sep 2015 16:15:00 +0900 Received: from HKXPR06MB0597.apcprd06.prod.outlook.com (10.161.181.146) by HKXPR06MB1015.apcprd06.prod.outlook.com (10.161.180.156) with Microsoft SMTP Server (TLS) id 15.1.262.15; Thu, 10 Sep 2015 07:14:59 +0000 Authentication-Results: spf=none (sender IP is ) smtp.mailfrom=kuninori.morimoto.gx@renesas.com; Received: from morimoto-PC.renesas.com (211.11.155.144) by HKXPR06MB0597.apcprd06.prod.outlook.com (10.161.181.146) with Microsoft SMTP Server (TLS) id 15.1.262.15; Thu, 10 Sep 2015 07:14:58 +0000 Message-ID: <87oahan403.wl%kuninori.morimoto.gx@renesas.com> From: Kuninori Morimoto Subject: [PATCH 02/14][RFC] arm64: renesas: r8a7795: add I2C support User-Agent: Wanderlust/2.15.9 Emacs/24.3 Mule/6.0 To: Wolfram Sang , Simon CC: Magnus , Linux-SH In-Reply-To: <87si6mn452.wl%kuninori.morimoto.gx@renesas.com> References: <87si6mn452.wl%kuninori.morimoto.gx@renesas.com> MIME-Version: 1.0 (generated by SEMI-EPG 1.14.7 - "Harue") Date: Thu, 10 Sep 2015 07:14:58 +0000 X-Originating-IP: [211.11.155.144] X-ClientProxiedBy: OS1PR01CA0012.jpnprd01.prod.outlook.com (25.161.225.150) To HKXPR06MB0597.apcprd06.prod.outlook.com (25.161.181.146) X-Microsoft-Exchange-Diagnostics: 1; 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#size-cells = <2>; + aliases { + i2c0 = &i2c0; + i2c1 = &i2c1; + i2c2 = &i2c2; + i2c3 = &i2c3; + i2c4 = &i2c4; + i2c5 = &i2c5; + i2c6 = &i2c6; + }; + cpus { #address-cells = <1>; #size-cells = <0>; @@ -403,13 +413,20 @@ reg = <0 0xe6150994 0 4>, <0 0xe61509a4 0 4>; clocks = <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, <&cp_clk>, - <&cp_clk>, <&cp_clk>; + <&cp_clk>, <&cp_clk>, + <&s3d2_clk>, <&s3d2_clk>, <&s3d2_clk>, + <&s3d2_clk>, <&s3d2_clk>, <&s3d2_clk>, + <&s3d2_clk>; #clock-cells = <1>; clock-indices = < R8A7795_CLK_GPIO7 R8A7795_CLK_GPIO6 R8A7795_CLK_GPIO5 R8A7795_CLK_GPIO4 R8A7795_CLK_GPIO3 R8A7795_CLK_GPIO2 R8A7795_CLK_GPIO1 R8A7795_CLK_GPIO0 + R8A7795_CLK_I2C6 R8A7795_CLK_I2C5 + R8A7795_CLK_I2C4 R8A7795_CLK_I2C3 + R8A7795_CLK_I2C2 R8A7795_CLK_I2C1 + R8A7795_CLK_I2C0 >; }; }; @@ -506,5 +523,75 @@ power-domains = <&cpg_clocks>; status = "disabled"; }; + + i2c0: i2c@e6500000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7795"; + reg = <0 0xe6500000 0 0x40>; + interrupts = ; + clocks = <&mstp9_clks R8A7795_CLK_I2C0>; + status = "disabled"; + }; + + i2c1: i2c@e6508000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7795"; + reg = <0 0xe6508000 0 0x40>; + interrupts = ; + clocks = <&mstp9_clks R8A7795_CLK_I2C1>; + status = "disabled"; + }; + + i2c2: i2c@e6510000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7795"; + reg = <0 0xe6510000 0 0x40>; + interrupts = ; + clocks = <&mstp9_clks R8A7795_CLK_I2C2>; + status = "disabled"; + }; + + i2c3: i2c@e66d0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7795"; + reg = <0 0xe66d0000 0 0x40>; + interrupts = ; + clocks = <&mstp9_clks R8A7795_CLK_I2C3>; + status = "disabled"; + }; + + i2c4: i2c@e66d8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7795"; + reg = <0 0xe66d8000 0 0x40>; + interrupts = ; + clocks = <&mstp9_clks R8A7795_CLK_I2C4>; + status = "disabled"; + }; + + i2c5: i2c@e66e0000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7795"; + reg = <0 0xe66e0000 0 0x40>; + interrupts = ; + clocks = <&mstp9_clks R8A7795_CLK_I2C5>; + status = "disabled"; + }; + + i2c6: i2c@e66e8000 { + #address-cells = <1>; + #size-cells = <0>; + compatible = "renesas,i2c-r8a7795"; + reg = <0 0xe66e8000 0 0x40>; + interrupts = ; + clocks = <&mstp9_clks R8A7795_CLK_I2C6>; + status = "disabled"; + }; }; }; diff --git a/include/dt-bindings/clock/r8a7795-clock.h b/include/dt-bindings/clock/r8a7795-clock.h index e28dd97..b7c2c95 100644 --- a/include/dt-bindings/clock/r8a7795-clock.h +++ b/include/dt-bindings/clock/r8a7795-clock.h @@ -46,6 +46,13 @@ #define R8A7795_CLK_GPIO2 10 #define R8A7795_CLK_GPIO1 11 #define R8A7795_CLK_GPIO0 12 +#define R8A7795_CLK_I2C6 18 +#define R8A7795_CLK_I2C5 19 +#define R8A7795_CLK_I2C4 27 +#define R8A7795_CLK_I2C3 28 +#define R8A7795_CLK_I2C2 29 +#define R8A7795_CLK_I2C1 30 +#define R8A7795_CLK_I2C0 31 /* MSTP10 */