@@ -80,6 +80,10 @@
};
cpg_clocks: cpg_clocks@e6150000 {
+ #address-cells = <2>;
+ #size-cells = <2>;
+ ranges;
+
compatible = "renesas,r8a7795-cpg-clocks",
"renesas,rcar-gen3-cpg-clocks";
reg = <0 0xe6150000 0 0x1000>;
@@ -87,7 +91,25 @@
#clock-cells = <1>;
clock-output-names = "main", "pll0", "pll1","pll2",
"pll3", "pll4";
+
+ mstp3_clks: mstp3_clks@e615013c {
+ compatible = "renesas,r8a7795-mstp-clocks",
+ "renesas,cpg-mstp-clocks";
+ reg = <0 0xe615013c 0 4>, <0 0xe6150048 0 4>;
+ clocks = <&p_clk>;
+ #clock-cells = <1>;
+ renesas,clock-indices = <R8A7795_CLK_SCIF2>;
+ clock-output-names = "scif2";
+ };
};
};
+
+ scif2: serial@e6e88000 {
+ compatible = "renesas,scif-r8a7795", "renesas,scif";
+ reg = <0 0xe6e88000 0 64>;
+ interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&mstp3_clks R8A7795_CLK_SCIF2>;
+ clock-names = "sci_ick";
+ };
};
};
@@ -24,6 +24,7 @@
/* MSTP2 */
/* MSTP3 */
+#define R8A7795_CLK_SCIF2 10
/* MSTP5 */