From patchwork Fri Jul 26 15:51:32 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2834242 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 9B2FC9F9CC for ; Fri, 26 Jul 2013 15:51:43 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id B6C7320222 for ; Fri, 26 Jul 2013 15:51:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id DA2A020216 for ; Fri, 26 Jul 2013 15:51:41 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1758114Ab3GZPvj (ORCPT ); Fri, 26 Jul 2013 11:51:39 -0400 Received: from moutng.kundenserver.de ([212.227.17.10]:54372 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756785Ab3GZPvg (ORCPT ); Fri, 26 Jul 2013 11:51:36 -0400 Received: from axis700.grange (dslb-094-221-102-122.pools.arcor-ip.net [94.221.102.122]) by mrelayeu.kundenserver.de (node=mreu3) with ESMTP (Nemesis) id 0MDJ3g-1UsrM114kG-00GX5j; Fri, 26 Jul 2013 17:51:33 +0200 Received: by axis700.grange (Postfix, from userid 1000) id DECA540BB4; Fri, 26 Jul 2013 17:51:32 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by axis700.grange (Postfix) with ESMTP id DC6C340BB3; Fri, 26 Jul 2013 17:51:32 +0200 (CEST) Date: Fri, 26 Jul 2013 17:51:32 +0200 (CEST) From: Guennadi Liakhovetski X-X-Sender: lyakh@axis700.grange To: linux-sh@vger.kernel.org cc: linux-mmc@vger.kernel.org, Magnus Damm , Chris Ball , devicetree@vger.kernel.org, Simon Horman Subject: [PATCH/RFC 2/2] ARM: shmobile: kzm9g: support DDR50 mode with 1.8V VccQ on MMCIF In-Reply-To: Message-ID: References: MIME-Version: 1.0 X-Provags-ID: V02:K0:jUeoDr0gFcSoBGMvtkCP/pnK0/hz6WGm+CaRBa2CiZq hfznDEJ7MAS3rTu/JshQWmxrJoU3mX5rJJIwzyMaQDdS8oOxYg 9Mnji0ZBlN24ZZPV6NckdqCWCCq2UXc+JAMivJporLGn9B7ZIk PeoyvnVKxJF3oXJLo0+pou5AuI/ZZ2CUIkdBOnn3RSt3Y1xNyC c8k7OYH4jdwrml582zHFPlL029AhsdQFXwpXvTEVnM5cIJUCr4 u9SDziOFfmn6d7WMFH+DF/uiuxCEVQofbzxwA9nJiBmoUT0Ai/ 36wHkaZIfoB1nnbK/k8tMgdgBRCwkrSvPCatwfLy65u4uOPUER 2ay/tjW1Bh5TdmL70wOK4XRGyJcbGETkyRMqryDCX3AxCLM46o MYSSBMmYV1Azw== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Spam-Status: No, score=-8.3 required=5.0 tests=BAYES_00,FREEMAIL_FROM, RCVD_IN_DNSWL_HI, RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP MMCIF on sh73a0 supports the UHS DDR50 mode and on the kzm9g board it can be used with MMC VccQ = 1.8V. This patch enables them. Signed-off-by: Guennadi Liakhovetski --- This patch is correct AFAICS, but pointless on kzm9g, because (at least on my board) th eMMC chip, installed on the board and connected to MMCIF doesn't support DDR, so, it cannot be enabled. This patch is therefore more of an example how these flags shall be used, than a real use case. If it is decided to apply it, it can be applied even before patch 1/2, it just won't have any effect at all. arch/arm/boot/dts/sh73a0-kzm9g-reference.dts | 1 + arch/arm/boot/dts/sh73a0.dtsi | 1 + 2 files changed, 2 insertions(+), 0 deletions(-) diff --git a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts index b99e890..d90de01 100644 --- a/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts +++ b/arch/arm/boot/dts/sh73a0-kzm9g-reference.dts @@ -191,6 +191,7 @@ bus-width = <8>; vmmc-supply = <®_1p8v>; + ddr-1v8; status = "okay"; }; diff --git a/arch/arm/boot/dts/sh73a0.dtsi b/arch/arm/boot/dts/sh73a0.dtsi index 86e79fe..1146be8 100644 --- a/arch/arm/boot/dts/sh73a0.dtsi +++ b/arch/arm/boot/dts/sh73a0.dtsi @@ -186,6 +186,7 @@ interrupts = <0 140 0x4 0 141 0x4>; reg-io-width = <4>; + uhs-ddr50; status = "disabled"; };