From patchwork Wed May 22 22:10:00 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Guennadi Liakhovetski X-Patchwork-Id: 2603791 Return-Path: X-Original-To: patchwork-linux-sh@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 82397DF215 for ; Wed, 22 May 2013 22:10:09 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1757306Ab3EVWKJ (ORCPT ); Wed, 22 May 2013 18:10:09 -0400 Received: from moutng.kundenserver.de ([212.227.126.171]:55923 "EHLO moutng.kundenserver.de" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1756742Ab3EVWKI (ORCPT ); Wed, 22 May 2013 18:10:08 -0400 Received: from axis700.grange (dslb-094-221-111-159.pools.arcor-ip.net [94.221.111.159]) by mrelayeu.kundenserver.de (node=mreu3) with ESMTP (Nemesis) id 0MOYWP-1UZWbE3Uyj-005n38; Thu, 23 May 2013 00:10:02 +0200 Received: by axis700.grange (Postfix, from userid 1000) id 089B140BB4; Thu, 23 May 2013 00:10:01 +0200 (CEST) Received: from localhost (localhost [127.0.0.1]) by axis700.grange (Postfix) with ESMTP id 05DF540BB3; Thu, 23 May 2013 00:10:00 +0200 (CEST) Date: Thu, 23 May 2013 00:10:00 +0200 (CEST) From: Guennadi Liakhovetski X-X-Sender: lyakh@axis700.grange To: linux-sh@vger.kernel.org cc: Simon Horman , Magnus Damm Subject: [PATCH 2/2] ARM: shmobile: sh73a0: div4 clocks must check the kick bit before changing rate In-Reply-To: Message-ID: References: User-Agent: Alpine 2.00 (DEB 1167 2008-08-23) MIME-Version: 1.0 X-Provags-ID: V02:K0:QkYd+SmlHrrgUzYD7oMMjGPi8faaIDclQQMPf16t+RM ffl+mId+6fg4Fg1CfD5u2EaM7ZITQ1N4pY9KbW1Jl9H02QenIX fS77QgrWIqGmAvzM/Wtm7jUR+iykBHTaz71Rs4KZs6RX697UN2 Ej+HZZPWGi2Vle9uuMjpVWXPgLmNMiIh9FvSfVNKDlf1vTFNWz mMprlKxbcGqIFFDyw72W41eH5G9NkDVCLav2HaFtQGUfObHVeU 3HasKSkhmPc+9b9y1ilcfeU0jtMA4BhW3P0G6uq108Js9L5nl7 lTIe6RHxsBIgSwcBXdPfFeeFdTNpM+OC3rzT1LRtnzGMH1s718 Wzr2D9K4tLJkeF7p5yWzzdDI8zX9HPB0AWz1nFS5KFMu4D142j 7Y3T5iW9jYHdQ== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org According to the datasheet, it is not allowed to change div4 clock rates if an earlier rate change operation is still in progress, as indicated by a set kick bit. Signed-off-by: Guennadi Liakhovetski --- arch/arm/mach-shmobile/clock-sh73a0.c | 24 +++++++++++++++++++----- 1 files changed, 19 insertions(+), 5 deletions(-) diff --git a/arch/arm/mach-shmobile/clock-sh73a0.c b/arch/arm/mach-shmobile/clock-sh73a0.c index 8cb6738..2ef27a6 100644 --- a/arch/arm/mach-shmobile/clock-sh73a0.c +++ b/arch/arm/mach-shmobile/clock-sh73a0.c @@ -257,7 +257,7 @@ static struct clk twd_clk = { .ops = &twd_clk_ops, }; -static struct sh_clk_ops zclk_ops; +static struct sh_clk_ops zclk_ops, kicker_ops; static const struct sh_clk_ops *div4_clk_ops; static int zclk_set_rate(struct clk *clk, unsigned long rate) @@ -326,18 +326,32 @@ static unsigned long zclk_recalc(struct clk *clk) return clk_get_rate(clk->parent); } -static void zclk_extend(void) +static int kicker_set_rate(struct clk *clk, unsigned long rate) { - div4_clk_ops = div4_clks[DIV4_Z].ops; + if (__raw_readl(FRQCRB) & (1 << 31)) + return -EBUSY; + return div4_clk_ops->set_rate(clk, rate); +} + +static void div4_clk_extend(void) +{ + int i; + + div4_clk_ops = div4_clks[0].ops; + + /* Add a kicker-busy check before changing the rate */ + kicker_ops = *div4_clk_ops; /* We extend the DIV4 clock with a 1:1 pass-through case */ zclk_ops = *div4_clk_ops; + kicker_ops.set_rate = kicker_set_rate; zclk_ops.set_rate = zclk_set_rate; zclk_ops.round_rate = zclk_round_rate; zclk_ops.recalc = zclk_recalc; - div4_clks[DIV4_Z].ops = &zclk_ops; + for (i = 0; i < DIV4_NR; i++) + div4_clks[i].ops = i == DIV4_Z ? &zclk_ops : &kicker_ops; } enum { DIV6_VCK1, DIV6_VCK2, DIV6_VCK3, DIV6_ZB1, @@ -702,7 +716,7 @@ void __init sh73a0_clock_init(void) if (!ret) { ret = sh_clk_div4_register(div4_clks, DIV4_NR, &div4_table); if (!ret) - zclk_extend(); + div4_clk_extend(); } if (!ret)