From patchwork Fri Nov 19 07:23:52 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Kuninori Morimoto X-Patchwork-Id: 338671 X-Patchwork-Delegate: lethal@linux-sh.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oAJ7O3KC015767 for ; Fri, 19 Nov 2010 07:24:06 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751348Ab0KSHYF (ORCPT ); Fri, 19 Nov 2010 02:24:05 -0500 Received: from mail.renesas.com ([202.234.163.13]:44725 "EHLO mail01.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1751257Ab0KSHYF (ORCPT ); Fri, 19 Nov 2010 02:24:05 -0500 X-AuditID: ac140384-00000006000004f6-6b-4ce62608574f Received: from guardian02.idc.renesas.com ([172.20.8.201]) by mail01.idc.renesas.com (sendmail) with ESMTP id oAJ7Nqhw002370; Fri, 19 Nov 2010 16:23:52 +0900 (JST) Received: (from root@localhost) by guardian02.idc.renesas.com with id oAJ7NqQh016960; Fri, 19 Nov 2010 16:23:52 +0900 (JST) Received: from mta05.idc.renesas.com (localhost [127.0.0.1]) by mta05.idc.renesas.com with ESMTP id oAJ7NqfL001995; Fri, 19 Nov 2010 16:23:52 +0900 (JST) Received: from PG10870.renesas.com ([172.30.8.159]) by ims05.idc.renesas.com (Sendmail) with ESMTPA id <0LC400331F7S3X@ims05.idc.renesas.com>; Fri, 19 Nov 2010 16:23:52 +0900 (JST) Date: Fri, 19 Nov 2010 16:23:52 +0900 (JST) Date-warning: Date header was inserted by ims05.idc.renesas.com From: Kuninori Morimoto Subject: [RFC][PATCH 6/6] ARM: mach-shmobile: clock-sh7372: remove pllc2 clock bogus In-reply-to: To: Paul Mundt Cc: Mark Brown , Magnus , Linux-SH , Liam Girdwood , Guennadi Message-id: MIME-version: 1.0 (generated by SEMI 1.14.6 - "Maruoka") Content-type: text/plain; charset=US-ASCII User-Agent: SEMI/1.14.6 (Maruoka) FLIM/1.14.7 (=?ISO-2022-JP-2?B?U2Fuag==?= =?ISO-2022-JP-2?B?GyQoRCtXGyhC?=) APEL/10.6 Emacs/23.2 (i386-mingw-nt5.1.2600) MULE/6.0 (HANACHIRUSATO) References: X-Brightmail-Tracker: AAAAAA== Sender: linux-sh-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-sh@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Fri, 19 Nov 2010 07:24:07 +0000 (UTC) diff --git a/arch/arm/mach-shmobile/board-ap4evb.c b/arch/arm/mach-shmobile/board-ap4evb.c index 53a281b..a1d8384 100644 --- a/arch/arm/mach-shmobile/board-ap4evb.c +++ b/arch/arm/mach-shmobile/board-ap4evb.c @@ -969,6 +969,11 @@ static int __init hdmi_init_pm_clock(void) goto out; } + ret = clk_enable(&sh7372_pllc2_clk); + if (ret < 0) { + pr_err("Cannot enable pllc2 clock\n"); + goto out; + } pr_debug("PLLC2 set frequency %lu\n", rate); ret = clk_set_parent(hdmi_ick, &sh7372_pllc2_clk); diff --git a/arch/arm/mach-shmobile/clock-sh7372.c b/arch/arm/mach-shmobile/clock-sh7372.c index cbeca28..e18a124 100644 --- a/arch/arm/mach-shmobile/clock-sh7372.c +++ b/arch/arm/mach-shmobile/clock-sh7372.c @@ -230,21 +230,13 @@ static int pllc2_set_rate(struct clk *clk, if (idx < 0) return idx; - if (rate == clk->parent->rate) { - pllc2_disable(clk); - return 0; - } + if (rate == clk->parent->rate) + return -EINVAL; value = __raw_readl(PLLC2CR) & ~(0x3f << 24); - if (value & 0x80000000) - pllc2_disable(clk); - __raw_writel((value & ~0x80000000) | ((idx + 19) << 24), PLLC2CR); - if (value & 0x80000000) - return pllc2_enable(clk); - return 0; }