From patchwork Tue Jul 28 10:03:12 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Palmer X-Patchwork-Id: 11688791 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AA4566C1 for ; Tue, 28 Jul 2020 10:03:32 +0000 (UTC) Received: by mail.kernel.org (Postfix) id A3E3E20829; Tue, 28 Jul 2020 10:03:32 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pl1-f194.google.com (mail-pl1-f194.google.com [209.85.214.194]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 836FA207E8 for ; Tue, 28 Jul 2020 10:03:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=0x0f.com header.i=@0x0f.com header.b="RxxRFot4" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 836FA207E8 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=0x0f.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=daniel@0x0f.com Received: by mail-pl1-f194.google.com with SMTP id t10so4298108plz.10 for ; Tue, 28 Jul 2020 03:03:32 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=lamJR30/OZj5TtLicXm1XN+ym7SAmHsDsmqcmVGRyfU=; b=RxxRFot40FR/bzu3ktrKn9CPPG/GmEqiNfU8dBveK4OoBLrgle5gaqfDmWxfcHm/oB BO43bj8T4IQ1t2RVyeRoVKPLxUK+pVQ6GeVG4uXKMJRQ5A+pRvzIKCPnHM9DsNCOB7ZP 5w+P4bKfL44ir9Qb6QdhQ7DIkez9zfRf8yNyw= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=lamJR30/OZj5TtLicXm1XN+ym7SAmHsDsmqcmVGRyfU=; b=OZf8GfZXfHQ8csANdqgaQIb5Nhte0QYq4xzWdue6eQ/VOJDtpZvR2HysdyYxHUygGC j8l8A4CVXOwj87NlXr4AcLMYy+ahEuYXVTG1IIDIUqjA9BXkpIBKxThLnXnTm4DZhQWD ECax5UfN7v+ChuGCFXL6kCLB7sGBjHp1Da2AYbEcyq85K8AYF0LrU64M4NtI43d354dp 9YO5SMQQrH1Sdf78L571DqgBRtBJVZiqgapr4klf+8pzv3GIHvJY95eNqBOOQrOC1oqu DrrSZJrrxd+AnEP30HHVh3mkdNyUz+jQCeTTvG20K7O31LafAd9aLw0zo3av2YET0DSU +dtQ== X-Gm-Message-State: AOAM530S5JFriZuDYaJC/IKNnkaYwg1V46HKocU9muE/5TTWO7vXRc+j pgpTc44b82HrpxD87OkBUSB1wfMKjJQ= X-Google-Smtp-Source: ABdhPJyspgAUCtVEFnqzqoStyWQgTfKDx8JEuEfdIxxoRbTIIAGvK6A92pC9SOAS3MaqsWeq8F2C7g== X-Received: by 2002:a17:90a:ca17:: with SMTP id x23mr3720648pjt.194.1595930611548; Tue, 28 Jul 2020 03:03:31 -0700 (PDT) Received: from shiro.work (p532183-ipngn200506sizuokaden.shizuoka.ocn.ne.jp. [153.199.2.183]) by smtp.googlemail.com with ESMTPSA id u66sm17779018pfb.191.2020.07.28.03.03.29 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jul 2020 03:03:30 -0700 (PDT) From: Daniel Palmer List-Id: To: soc@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, arnd@arndb.de, robh@kernel.org, Daniel Palmer Subject: [PATCH v2 0/9] ARM: mstar: DT filling out Date: Tue, 28 Jul 2020 19:03:12 +0900 Message-Id: <20200728100321.1691745-1-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 This series adds a few low hanging fruit that are purely DT changes to keep the ball rolling while I work on series for more complicated things like the interrupt controllers. Summary of changes: - Adds the IMI SRAM region and sets the right size for each family - Adds the ARM PMU - Adds a syscon for a lump of registers called "pmsleep" - Uses the pmsleep syscon to enable reboot Changes since v1: - pmsleep node has been given it's own compatible string alongside the generic syscon based on Arnd's feedback. - dt binding description has been added for the above. - To avoid having to update MAINTAINERS repeatly I've moved the existing two binding descriptions in with the pmsleep one in arm/mstar. Daniel Palmer (9): dt-bindings: arm: mstar: Add binding details for mstar,pmsleep dt-bindings: arm: mstar: Move existing MStar binding descriptions ARM: mstar: Add IMI SRAM region ARM: mstar: Adjust IMI size of infinity ARM: mstar: Adjust IMI size for mercury5 ARM: mstar: Adjust IMI size for infinity3 ARM: mstar: Add PMU ARM: mstar: Add "pmsleep" node to base dtsi ARM: mstar: Add reboot support .../{misc => arm/mstar}/mstar,l3bridge.yaml | 2 +- .../bindings/arm/mstar/mstar,pmsleep.yaml | 43 +++++++++++++++++++ .../bindings/arm/{ => mstar}/mstar.yaml | 2 +- MAINTAINERS | 2 +- arch/arm/boot/dts/infinity.dtsi | 4 ++ arch/arm/boot/dts/infinity3.dtsi | 4 ++ arch/arm/boot/dts/mercury5.dtsi | 4 ++ arch/arm/boot/dts/mstar-v7.dtsi | 26 ++++++++++- 8 files changed, 83 insertions(+), 4 deletions(-) rename Documentation/devicetree/bindings/{misc => arm/mstar}/mstar,l3bridge.yaml (93%) create mode 100644 Documentation/devicetree/bindings/arm/mstar/mstar,pmsleep.yaml rename Documentation/devicetree/bindings/arm/{ => mstar}/mstar.yaml (93%)