Message ID | 20200824151035.31093-1-lars.povlsen@microchip.com (mailing list archive) |
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Headers | show
Return-Path: <SRS0=QWJy=CC=microchip.com=Lars.Povlsen@kernel.org> Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 7E55B138A for <patchwork-soc@patchwork.kernel.org>; Mon, 24 Aug 2020 15:10:47 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 77DBD2078D; Mon, 24 Aug 2020 15:10:47 +0000 (UTC) Delivered-To: soc@kernel.org Received: from esa1.microchip.iphmx.com (esa1.microchip.iphmx.com [68.232.147.91]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 28DE5207CD for <soc@kernel.org>; Mon, 24 Aug 2020 15:10:46 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=microchip.com header.i=@microchip.com header.b="Q7PEO64p" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 28DE5207CD Authentication-Results: mail.kernel.org; dmarc=pass (p=quarantine dis=none) header.from=microchip.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=Lars.Povlsen@microchip.com DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=microchip.com; i=@microchip.com; q=dns/txt; s=mchp; t=1598281847; x=1629817847; h=from:to:cc:subject:date:message-id:mime-version: content-transfer-encoding; bh=t4cBW0KJQ9oAF55ARnk4BDNoEvlWUJYtIpys/EI51Sk=; b=Q7PEO64ppqw36HieAO+XNu0C0UWC34DpkTg3r/lQxlORkxKxIvcSp/PC Q0XcA6UmH5/zFFLtHknVqqNu+u4zAEIBAwlRXoNK3e6QlKe8+RCcN70sx SK61EIgOkyHCOn9MxsnyVqzrMcv3q3Dgbd59bFunPxvt6OkRbTQmFoRV8 laB6PfoQo7nI636fQFa2Ckaqe20idSNG32eBa5hB27bNCmdcblzmTy2dW U04m6wypSYM4rjQcfvjoprXkbAMa0Z/QKKZHtKZmdDDubCsEass/ruBNN W80yehxwVNR+P8kiTJAUtgXMDED/HoVcoHTMjOhHh0O/r5rkFfMmW11Jv Q==; IronPort-SDR: CmC1ij+6/53nmSXaamACFN8afuFA/IfnsSnlrU2LnWEc8NDuLI5yZndWLtG05i5hGusMZjmBVR 4qNEhEfNNSVCZ3TT7lRgyeKwsZT18f0b9IH4YMrsX/5hP8tr3Uw39qoJcutJtr9KzXfxjFsFjQ hdXRF7xYun1ohCnkKmGv/6Aod217wafBLHeU7z5mQTPzmvN5Jd99jUSxSvsu4FOBNcmH0AAtNC m2APQ6MARLNgG54zTSGm3s4DrFrGoA1x5n3agrHpj9P5yoCq+a7JRvvjdSnjdIgUk2MfljIjVz 9C0= X-IronPort-AV: E=Sophos;i="5.76,349,1592895600"; d="scan'208";a="92912510" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa1.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 24 Aug 2020 08:10:46 -0700 Received: from chn-vm-ex04.mchp-main.com (10.10.85.152) by chn-vm-ex02.mchp-main.com (10.10.85.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1979.3; Mon, 24 Aug 2020 08:10:10 -0700 Received: from soft-dev15.microsemi.net (10.10.115.15) by chn-vm-ex04.mchp-main.com (10.10.85.152) with Microsoft SMTP Server id 15.1.1979.3 via Frontend Transport; Mon, 24 Aug 2020 08:10:40 -0700 From: Lars Povlsen <lars.povlsen@microchip.com> List-Id: <soc.lore.kernel.org> To: Ulf Hansson <ulf.hansson@linaro.org>, Adrian Hunter <adrian.hunter@intel.com>, SoC Team <soc@kernel.org> CC: Lars Povlsen <lars.povlsen@microchip.com>, Microchip Linux Driver Support <UNGLinuxDriver@microchip.com>, <linux-mmc@vger.kernel.org>, <devicetree@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>, <linux-kernel@vger.kernel.org>, Alexandre Belloni <alexandre.belloni@bootlin.com> Subject: [PATCH v4 0/3] mmc: Adding support for Microchip Sparx5 SoC Date: Mon, 24 Aug 2020 17:10:32 +0200 Message-ID: <20200824151035.31093-1-lars.povlsen@microchip.com> X-Mailer: git-send-email 2.27.0 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain |
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mmc: Adding support for Microchip Sparx5 SoC
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