Message ID | cover.1668788918.git.geert+renesas@glider.be (mailing list archive) |
---|---|
Headers | show |
Series | Renesas SoC updates for v6.2 (take two) | expand |
Hello: This series was applied to soc/soc.git (for-next) by Arnd Bergmann <arnd@arndb.de>: On Fri, 18 Nov 2022 17:44:57 +0100 you wrote: > Hi SoC folks, > > This is my second pull request for the inclusion of Renesas SoC updates > for v6.2, and the first one including support for an SoC with a RISC-V > CPU core (and including no changes for SoCs with arm32 CPU cores). > > It consists of 7 parts: > > [...] Here is the summary with links: - [GIT,PULL,1/7] Renesas ARM defconfig updates for v6.2 https://git.kernel.org/soc/soc/c/1d4456221fe3 - [GIT,PULL,2/7] Renesas ARM DT updates for v6.2 (take two) https://git.kernel.org/soc/soc/c/1e9629820ab3 - [GIT,PULL,3/7] Renesas driver updates for v6.2 (take two) https://git.kernel.org/soc/soc/c/cb667ad7524a - [GIT,PULL,4/7] Renesas DT binding updates for v6.2 (take two) https://git.kernel.org/soc/soc/c/f241625bb3ae - [GIT,PULL,5/7] Renesas RISC-V defconfig updates for v6.2 https://git.kernel.org/soc/soc/c/267511c9778b - [GIT,PULL,6/7] Renesas RISC-V DT updates for v6.2 https://git.kernel.org/soc/soc/c/2092ad3a79ca - [GIT,PULL,7/7] Renesas RISC-V SoC updates for v6.2 https://git.kernel.org/soc/soc/c/92f3bfaced6e You are awesome, thank you!