From patchwork Sun Apr 19 17:11:51 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 11497743 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id D36956CA for ; Sun, 19 Apr 2020 17:12:24 +0000 (UTC) Received: by mail.kernel.org (Postfix) id CCB4A22247; Sun, 19 Apr 2020 17:12:24 +0000 (UTC) Delivered-To: soc@kernel.org Received: from v6.sk (v6.sk [167.172.42.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 9E70E21473 for ; Sun, 19 Apr 2020 17:12:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 9E70E21473 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=v3.sk Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lkundrak@v6.sk Received: from localhost (v6.sk [IPv6:::1]) by v6.sk (Postfix) with ESMTP id 687D5610B8; Sun, 19 Apr 2020 17:12:23 +0000 (UTC) From: Lubomir Rintel List-Id: To: soc@kernel.org Cc: Olof Johansson , Arnd Bergmann , Linux ARM , Daniel Mack , Haojian Zhuang , Robert Jarzmik , linux-kernel@vger.kernel.org, Lubomir Rintel , Andrew Lunn Subject: [PATCH 09/15] ARM: dts: mmp3: Fix L2 cache controller node name Date: Sun, 19 Apr 2020 19:11:51 +0200 Message-Id: <20200419171157.672999-10-lkundrak@v3.sk> X-Mailer: git-send-email 2.26.0 In-Reply-To: <20200419171157.672999-1-lkundrak@v3.sk> References: <20200419171157.672999-1-lkundrak@v3.sk> MIME-Version: 1.0 The current one makes validation unhappy: mmp3-dell-ariel.dt.yaml: l2-cache-controller@d0020000: $nodename:0: 'l2-cache-controller@d0020000' does not match '^(cache-controller|cpu)(@[0-9a-f,]+)*$' Signed-off-by: Lubomir Rintel Reviewed-by: Andrew Lunn --- arch/arm/boot/dts/mmp3.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/mmp3.dtsi b/arch/arm/boot/dts/mmp3.dtsi index 3ac5e4e86e56d..531e1d85d5fa6 100644 --- a/arch/arm/boot/dts/mmp3.dtsi +++ b/arch/arm/boot/dts/mmp3.dtsi @@ -523,7 +523,7 @@ ssp4: spi@d4039000 { }; }; - l2: l2-cache-controller@d0020000 { + l2: cache-controller@d0020000 { compatible = "marvell,tauros3-cache", "arm,pl310-cache"; reg = <0xd0020000 0x1000>; cache-unified;