diff mbox series

Revert "ARM: sti: Implement dummy L2 cache's write_sec"

Message ID 20200618172456.29475-1-patrice.chotard@st.com (mailing list archive)
State Mainlined
Commit 0f77ce26ebcf6ea384421d2dd47b924b83649692
Headers show
Series Revert "ARM: sti: Implement dummy L2 cache's write_sec" | expand

Commit Message

Patrice CHOTARD June 18, 2020, 5:24 p.m. UTC 
From: Patrice Chotard <patrice.chotard@st.com>

This reverts commit 7b8e0188fa717cd9abc4fb52587445b421835c2a.

Initially, STiH410-B2260 was supposed to be secured, that's why
l2c_write_sec was stubbed to avoid secure register access from
non secure world.

But by default, STiH410-B2260 is running in non secure mode,
so L2 cache register accesses are authorized, l2c_write_sec stub
is not needed.

With this patch, L2 cache is configured and performance are enhanced.

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
Cc: Alain Volmat <alain.volmat@st.com>
---
 arch/arm/mach-sti/board-dt.c | 9 ---------
 1 file changed, 9 deletions(-)

Comments

patchwork-bot+linux-soc@kernel.org June 28, 2020, 1:11 p.m. UTC | #1 
Hello:

This patch was applied to soc/soc.git (refs/heads/for-next).

On Thu, 18 Jun 2020 19:24:56 +0200 you wrote:
> From: Patrice Chotard <patrice.chotard@st.com>
> 
> This reverts commit 7b8e0188fa717cd9abc4fb52587445b421835c2a.
> 
> Initially, STiH410-B2260 was supposed to be secured, that's why
> l2c_write_sec was stubbed to avoid secure register access from
> non secure world.
> 
> [...]


Here is a summary with links:
  - Revert "ARM: sti: Implement dummy L2 cache's write_sec"
    https://git.kernel.org/soc/soc/c/0f77ce26ebcf6ea384421d2dd47b924b83649692

You are awesome, thank you!
diff mbox series

Patch

diff --git a/arch/arm/mach-sti/board-dt.c b/arch/arm/mach-sti/board-dt.c
index dcb98937fcf5..ffecbf29646f 100644
--- a/arch/arm/mach-sti/board-dt.c
+++ b/arch/arm/mach-sti/board-dt.c
@@ -20,14 +20,6 @@  static const char *const stih41x_dt_match[] __initconst = {
 	NULL
 };
 
-static void sti_l2_write_sec(unsigned long val, unsigned reg)
-{
-	/*
-	 * We can't write to secure registers as we are in non-secure
-	 * mode, until we have some SMI service available.
-	 */
-}
-
 DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree")
 	.dt_compat	= stih41x_dt_match,
 	.l2c_aux_val	= L2C_AUX_CTRL_SHARED_OVERRIDE |
@@ -36,5 +28,4 @@  DT_MACHINE_START(STM, "STi SoC with Flattened Device Tree")
 			  L2C_AUX_CTRL_WAY_SIZE(4),
 	.l2c_aux_mask	= 0xc0000fff,
 	.smp		= smp_ops(sti_smp_ops),
-	.l2c_write_sec	= sti_l2_write_sec,
 MACHINE_END