From patchwork Fri Jul 17 09:04:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniele Alessandrelli X-Patchwork-Id: 11669573 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A3DFC60D for ; Fri, 17 Jul 2020 09:04:40 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 9E46221702; Fri, 17 Jul 2020 09:04:40 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mga17.intel.com (mga17.intel.com [192.55.52.151]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 667C120829; Fri, 17 Jul 2020 09:04:40 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 667C120829 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=daniele.alessandrelli@linux.intel.com IronPort-SDR: CUSqNBUrjh2lEIgnsA3FSbHGDGjyAIg33qVj4Aw4zSY5GOvXJNZcg6v8u39Oz1g0hCu5STR0LU sgLBTZp1JhMw== X-IronPort-AV: E=McAfee;i="6000,8403,9684"; a="129643950" X-IronPort-AV: E=Sophos;i="5.75,362,1589266800"; d="scan'208";a="129643950" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga107.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jul 2020 02:04:40 -0700 IronPort-SDR: oxDGWDPvJWNBre7UxazejGNTcp7NVQeVN2tR4A2KrErWJ6rvDc82RqTLUErslqQ9ThFK9ZSBb6 IceIci2bcDxQ== X-IronPort-AV: E=Sophos;i="5.75,362,1589266800"; d="scan'208";a="460786012" Received: from enaessen-mobl1.ger.corp.intel.com (HELO dalessan-mobl1.ir.intel.com) ([10.251.86.9]) by orsmga005-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 17 Jul 2020 02:04:35 -0700 From: Daniele Alessandrelli List-Id: To: linux-arm-kernel@lists.infradead.org, SoC Team , Rob Herring , Arnd Bergmann , Olof Johansson Cc: Daniele Alessandrelli , devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Jassi Brar , Catalin Marinas , Will Deacon , "Paul J. Murphy" , "Paul J. Murphy" , Dinh Nguyen Subject: [PATCH v4 1/5] arm64: Add config for Keem Bay SoC Date: Fri, 17 Jul 2020 10:04:10 +0100 Message-Id: <20200717090414.313530-2-daniele.alessandrelli@linux.intel.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200717090414.313530-1-daniele.alessandrelli@linux.intel.com> References: <20200717090414.313530-1-daniele.alessandrelli@linux.intel.com> MIME-Version: 1.0 From: Daniele Alessandrelli Add ARCH_KEEMBAY configuration option to support Intel Movidius SoC code-named Keem Bay. Reviewed-by: Dinh Nguyen Signed-off-by: Daniele Alessandrelli --- arch/arm64/Kconfig.platforms | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms index 8dd05b2a925c..95c1b9042009 100644 --- a/arch/arm64/Kconfig.platforms +++ b/arch/arm64/Kconfig.platforms @@ -121,6 +121,11 @@ config ARCH_HISI help This enables support for Hisilicon ARMv8 SoC family +config ARCH_KEEMBAY + bool "Keem Bay SoC" + help + This enables support for Intel Movidius SoC code-named Keem Bay. + config ARCH_MEDIATEK bool "MediaTek SoC Family" select ARM_GIC