Hi Arnd, Kevin, and Olof:
Please pull in these SoCFPGA DTS fixes for v5.8. This has the correct "Fixes" tag.
Thanks,
Dinh
The following changes since commit 11ba468877bb23f28956a35e896356252d63c983:
Linux 5.8-rc5 (2020-07-12 16:34:50 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git tags/socfpga_fixes_for_v5.8_v2
for you to fetch changes up to 681a5c71fb829fc2193e3bb524af41525477f5c3:
arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema (2020-07-15 14:13:00 -0500)
----------------------------------------------------------------
arm/arm64: dts: socfpga: fixes for v5.8
- Add status = "okay" in QSPI
- Increase QSPI size in reg property
- Fix dtschema for SoCFPGA platforms
----------------------------------------------------------------
Dinh Nguyen (3):
arm64: dts: agilex: add status to qspi dts node
arm64: dts: stratix10: add status to qspi dts node
arm64: dts: stratix10: increase QSPI reg address in nand dts file
Krzysztof Kozlowski (2):
ARM: dts: socfpga: Align L2 cache-controller nodename with dtschema
arm64: dts: spcfpga: Align GIC, NAND and UART nodenames with dtschema
arch/arm/boot/dts/socfpga.dtsi | 2 +-
arch/arm/boot/dts/socfpga_arria10.dtsi | 2 +-
arch/arm64/boot/dts/altera/socfpga_stratix10.dtsi | 8 ++++----
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk.dts | 1 +
arch/arm64/boot/dts/altera/socfpga_stratix10_socdk_nand.dts | 7 ++++---
arch/arm64/boot/dts/intel/socfpga_agilex_socdk.dts | 1 +
6 files changed, 12 insertions(+), 9 deletions(-)