From patchwork Sat Jul 18 20:50:10 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lubomir Rintel X-Patchwork-Id: 11672051 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 17FFD13B4 for ; Sat, 18 Jul 2020 20:50:48 +0000 (UTC) Received: by mail.kernel.org (Postfix) id 1393221741; Sat, 18 Jul 2020 20:50:48 +0000 (UTC) Delivered-To: soc@kernel.org Received: from v6.sk (v6.sk [167.172.42.174]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id D8BC820738; Sat, 18 Jul 2020 20:50:47 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D8BC820738 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=v3.sk Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=lkundrak@v6.sk Received: from localhost (v6.sk [IPv6:::1]) by v6.sk (Postfix) with ESMTP id D51A960D2F; Sat, 18 Jul 2020 20:50:46 +0000 (UTC) From: Lubomir Rintel To: Arnd Bergmann , Olof Johansson List-Id: Cc: SoC Team , Rob Herring , linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, Lubomir Rintel Subject: [PATCH v2 04/13] ARM: dts: mmp2: Extend the MPMU reg range Date: Sat, 18 Jul 2020 22:50:10 +0200 Message-Id: <20200718205019.184927-5-lkundrak@v3.sk> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20200718205019.184927-1-lkundrak@v3.sk> References: <20200718205019.184927-1-lkundrak@v3.sk> MIME-Version: 1.0 The ACGR register is at the offset of 0x1024, beyond the 4k originally assigned to the MPMU range. Signed-off-by: Lubomir Rintel --- arch/arm/boot/dts/mmp2.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/mmp2.dtsi b/arch/arm/boot/dts/mmp2.dtsi index 9b8a156cf73e5..9e77f685fb188 100644 --- a/arch/arm/boot/dts/mmp2.dtsi +++ b/arch/arm/boot/dts/mmp2.dtsi @@ -415,7 +415,7 @@ ssp4: spi@d4039000 { soc_clocks: clocks { compatible = "marvell,mmp2-clock"; - reg = <0xd4050000 0x1000>, + reg = <0xd4050000 0x2000>, <0xd4282800 0x400>, <0xd4015000 0x1000>; reg-names = "mpmu", "apmu", "apbc";