@@ -210,6 +210,19 @@ adma1: dma-controller@d42a0900 {
#dma-cells = <1>;
status = "disabled";
};
+
+ audio_clk: clocks@d42a0c30 {
+ compatible = "marvell,mmp2-audio-clock";
+ reg = <0xd42a0c30 0x10>;
+ clock-names = "audio", "vctcxo", "i2s0", "i2s1";
+ clocks = <&soc_clocks MMP2_CLK_AUDIO>,
+ <&soc_clocks MMP2_CLK_VCTCXO>,
+ <&soc_clocks MMP2_CLK_I2S0>,
+ <&soc_clocks MMP2_CLK_I2S1>;
+ power-domains = <&soc_clocks MMP2_POWER_DOMAIN_AUDIO>;
+ #clock-cells = <1>;
+ status = "disabled";
+ };
};
apb@d4000000 { /* APB */
This device generates the audio codec master clock and bit clock. Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> --- arch/arm/boot/dts/mmp2.dtsi | 13 +++++++++++++ 1 file changed, 13 insertions(+)