From patchwork Tue Jul 28 10:03:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Palmer X-Patchwork-Id: 11688807 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AB3516C1 for ; Tue, 28 Jul 2020 10:03:54 +0000 (UTC) Received: by mail.kernel.org (Postfix) id A5EE52083E; Tue, 28 Jul 2020 10:03:54 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pl1-f195.google.com (mail-pl1-f195.google.com [209.85.214.195]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 84E8020792 for ; Tue, 28 Jul 2020 10:03:54 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=0x0f.com header.i=@0x0f.com header.b="IDJHDqNL" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 84E8020792 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=0x0f.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=daniel@0x0f.com Received: by mail-pl1-f195.google.com with SMTP id d1so9623412plr.8 for ; Tue, 28 Jul 2020 03:03:54 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=B89mjClqeI/vqWkN9tLpJuvAY3gONZ+D/nVVB1nJjqE=; b=IDJHDqNLXGnZEzFNlqEOTInutoPxbVgpW/zs4sxqngNtawOBMyGB0+/kv3OOo1sgl+ vgk0LA9WseadMqv/xlCv/9hWIaz3tiKOa3lDzToavjt4NOHqqCoRZnHvMIfNlxW1HIJw 93rc3DgLtjM7PoPKVvv0GLFR1HA0MSaG5CXAE= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=B89mjClqeI/vqWkN9tLpJuvAY3gONZ+D/nVVB1nJjqE=; b=MynvJHZeBlSCeOyqcubR3ZNH62wrSBu3NHnOd/3wlN1jfaxeXZTfIPNahTmnjZGgHX 7HH2W0hOCT44M8cqW6KLF8AhOagmge+Va9FOMa2aJIjrhLkqM9WiihF06qCN8+cuHZzj t+5OpA3c8Ka9PijAzC0UWnKF52cEQ50wVCbA7iEHDZVYCg5KwoDLmKip5vmVFh7FQ1lu 0H5h2InTGyCnWnbB8gM9GxBB5D2l8i678UpEWtDc1c7UQmbzaNHCYUXl4UUxUwWDLGZ0 z3svRTu69i5Kvv0fS5Ndhx8R6fCNbQ+HLp1LJRnygJMeCZkWMuCes0BXY3yOXwRJ478l 31Pw== X-Gm-Message-State: AOAM530boxVcNPK/GuBv/6M5VSkv7cU2JMIQFsQZjnEUlO2Ft8KcsQLe +GMnoomzH9frgGhYLp7lTRLJ8pbxkh4= X-Google-Smtp-Source: ABdhPJwzavziDgWZ8/8aJJSmyTGpB3WR5DC+B2ky5X3WtG3n/UQyG/0pTtLr/GClhyOMrQxJuYWTqg== X-Received: by 2002:a17:902:cb91:: with SMTP id d17mr4528874ply.223.1595930633809; Tue, 28 Jul 2020 03:03:53 -0700 (PDT) Received: from shiro.work (p532183-ipngn200506sizuokaden.shizuoka.ocn.ne.jp. [153.199.2.183]) by smtp.googlemail.com with ESMTPSA id u66sm17779018pfb.191.2020.07.28.03.03.51 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 28 Jul 2020 03:03:53 -0700 (PDT) From: Daniel Palmer List-Id: To: soc@kernel.org Cc: devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, arnd@arndb.de, robh@kernel.org, Daniel Palmer Subject: [PATCH v2 8/9] ARM: mstar: Add "pmsleep" node to base dtsi Date: Tue, 28 Jul 2020 19:03:20 +0900 Message-Id: <20200728100321.1691745-9-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20200728100321.1691745-1-daniel@0x0f.com> References: <20200728100321.1691745-1-daniel@0x0f.com> MIME-Version: 1.0 This patch adds a node for the pmsleep area so that other drivers can access registers contained within it. Signed-off-by: Daniel Palmer --- arch/arm/boot/dts/mstar-v7.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi index f787b8e4b67f..bb7fb3e689a7 100644 --- a/arch/arm/boot/dts/mstar-v7.dtsi +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -73,6 +73,11 @@ riu: bus@1f000000 { #size-cells = <1>; ranges = <0x0 0x1f000000 0x00400000>; + pmsleep: syscon@1c00 { + compatible = "mstar,pmsleep", "syscon"; + reg = <0x1c00 0x100>; + }; + l3bridge: l3bridge@204400 { compatible = "mstar,l3bridge"; reg = <0x204400 0x200>;