| Message ID | 20200907121831.242281-3-andre.przywara@arm.com (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | e916bfacf558ee835c480d2c2dad9d144baf9e1c |
| Headers | show |
| Series | ARM/arm64: dts: Fix SP804/SP805 users | expand |
diff --git a/arch/arm/boot/dts/nspire.dtsi b/arch/arm/boot/dts/nspire.dtsi index d9a0fd7524dc..90e033d9141f 100644 --- a/arch/arm/boot/dts/nspire.dtsi +++ b/arch/arm/boot/dts/nspire.dtsi @@ -145,15 +145,19 @@ timer0: timer@900C0000 { reg = <0x900C0000 0x1000>; - - clocks = <&timer_clk>; + clocks = <&timer_clk>, <&timer_clk>, + <&timer_clk>; + clock-names = "timer0clk", "timer1clk", + "apb_pclk"; }; timer1: timer@900D0000 { reg = <0x900D0000 0x1000>; interrupts = <19>; - - clocks = <&timer_clk>; + clocks = <&timer_clk>, <&timer_clk>, + <&timer_clk>; + clock-names = "timer0clk", "timer1clk", + "apb_pclk"; }; watchdog: watchdog@90060000 {
Even though the SP804 binding allows to specify only one clock, the primecell driver requires a named clock to activate the bus clock. Specify the one clock three times and provide some clock-names, to make the DT match the SP804 and primecell binding. Signed-off-by: Andre Przywara <andre.przywara@arm.com> --- arch/arm/boot/dts/nspire.dtsi | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-)