From patchwork Thu Sep 24 10:13:42 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Alexandre TORGUE X-Patchwork-Id: 11796917 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id B5A5C618 for ; Thu, 24 Sep 2020 10:13:50 +0000 (UTC) Received: by mail.kernel.org (Postfix) id AD6952399A; Thu, 24 Sep 2020 10:13:50 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mx07-00178001.pphosted.com (mx08-00178001.pphosted.com [91.207.212.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 23A0721D24; Thu, 24 Sep 2020 10:13:49 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=st.com header.i=@st.com header.b="0tw+DVK1" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 23A0721D24 Authentication-Results: mail.kernel.org; dmarc=pass (p=none dis=none) header.from=st.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=alexandre.torgue@st.com Received: from pps.filterd (m0046661.ppops.net [127.0.0.1]) by mx07-00178001.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 08OABp7x007665; Thu, 24 Sep 2020 12:13:46 +0200 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=st.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=STMicroelectronics; bh=G/pRQUcLQajbq7mPBBrtBIhPCd4FLXgK/Hoas5t5Has=; b=0tw+DVK1e6pyLuaWGUmnbycOS3/u/M0itqKif/ZyWKl8fKzz5bjPWR2Kg0jA/GMNpUOZ JiUiYw2DHjRLA8LeXLtIQJqT0Dz2ENDubjx0wbU0+KF4BtgXtPVaNF/2dJzW80WYCj/k Wk/zRFCoi5wMyoNj1mtc3Oj+uVJAKbst7r6QA30/feUpAN2BokdMjaK+fbdtVBWezMWW rktuivrtdrgVmUexK0ZFRsFhAzB0B5H0SV9lHqwWTBakSoFDELTaoS8dVkum7vDxTCvV 2I5okN2qhYOxBIh11D3tdfoa/Ubg2q+vZTl6iNHGj9MzmR9Z+9XjaO0sMfuLcqFyGKSS mQ== Received: from beta.dmz-eu.st.com (beta.dmz-eu.st.com [164.129.1.35]) by mx07-00178001.pphosted.com with ESMTP id 33n8vf4vk4-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Thu, 24 Sep 2020 12:13:46 +0200 Received: from euls16034.sgp.st.com (euls16034.sgp.st.com [10.75.44.20]) by beta.dmz-eu.st.com (STMicroelectronics) with ESMTP id C125A10002A; Thu, 24 Sep 2020 12:13:45 +0200 (CEST) Received: from Webmail-eu.st.com (sfhdag3node2.st.com [10.75.127.8]) by euls16034.sgp.st.com (STMicroelectronics) with ESMTP id AFFD72A6FF9; Thu, 24 Sep 2020 12:13:45 +0200 (CEST) Received: from localhost (10.75.127.51) by SFHDAG3NODE2.st.com (10.75.127.8) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Thu, 24 Sep 2020 12:13:45 +0200 From: Alexandre Torgue List-Id: To: Arnd Bergmann , Olof Johansson , Kevin Hilman , , , CC: Maxime Coquelin , Alexandre Torgue Subject: [PATCH] ARM: multi_v7_defconfig: add FMC2 EBI controller support Date: Thu, 24 Sep 2020 12:13:42 +0200 Message-ID: <20200924101342.4707-1-alexandre.torgue@st.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 X-Originating-IP: [10.75.127.51] X-ClientProxiedBy: SFHDAG6NODE3.st.com (10.75.127.18) To SFHDAG3NODE2.st.com (10.75.127.8) X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.235,18.0.687 definitions=2020-09-24_05:2020-09-24,2020-09-24 signatures=0 From: Christophe Kerello This patch adds FMC2 EBI controller support used by STM32MP SOCs. Signed-off-by: Christophe Kerello Signed-off-by: Alexandre Torgue --- Hi guys I only have this patch for concerning STM32 config. Can you please merge it ? cheers Alex diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig index e9e76e32f10f..4929cc8a9b6a 100644 --- a/arch/arm/configs/multi_v7_defconfig +++ b/arch/arm/configs/multi_v7_defconfig @@ -1011,6 +1011,7 @@ CONFIG_EXTCON_MAX14577=m CONFIG_EXTCON_MAX77693=m CONFIG_EXTCON_MAX8997=m CONFIG_TI_AEMIF=y +CONFIG_STM32_FMC2_EBI=y CONFIG_EXYNOS5422_DMC=m CONFIG_IIO=y CONFIG_IIO_SW_TRIGGER=y