From patchwork Fri Oct 2 13:34:16 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Palmer X-Patchwork-Id: 11813559 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AF590139F for ; Fri, 2 Oct 2020 13:34:43 +0000 (UTC) Received: by mail.kernel.org (Postfix) id A9E1F2226A; Fri, 2 Oct 2020 13:34:43 +0000 (UTC) Delivered-To: soc@kernel.org Received: from mail-pj1-f68.google.com (mail-pj1-f68.google.com [209.85.216.68]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 764DC221EC for ; Fri, 2 Oct 2020 13:34:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=0x0f.com header.i=@0x0f.com header.b="p3DPytT8" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 764DC221EC Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=0x0f.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=daniel@0x0f.com Received: by mail-pj1-f68.google.com with SMTP id i3so792863pjz.4 for ; Fri, 02 Oct 2020 06:34:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=0x0f.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=7SjJAe3oHt3KB6nicp1+OfBnUkZSTnnqwPcXU79zsAk=; b=p3DPytT8DeuuG6FrFfwq8QVj6Thw52fCHJtg16Yzn/f1150ENXnCYXUmMTn0bb/TvY QHIcbyRM7PJGaCyvUIUFcik7Y3ZVineOWajY6LOi9+JSLEYTMs/igZP9LHigINWVLRss E+vjO0+TnSuEmGg+/vFPgQRQQTtDB0SZ1Va6U= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=7SjJAe3oHt3KB6nicp1+OfBnUkZSTnnqwPcXU79zsAk=; b=rWcSDsVYUk4vn3c3YOOl3+yZpDF3mDarU7ocuOhS8Kj5YeyYD7dO4fWRE2gKULqio4 7me1LaM4Km8kex6H8Oy9M0ESoWneXOC6NdnkAw/fJJu2Cn+5DXRSBR7XH9ABIu/1hnow 03/+fXvQRND11HVg86/x+yNNSXT8AncwTWMgIHOg/4XSQxGKKiSJoWja/7SqwKeav/ht XwnhmGkSnOwiFdD7GlYUdyx9+8O+7sob7SqywMW65o87UFzs2eDiPkmB2vc6gojvfcux epukYOhbZFs4zt32q6fpM7GF+t8hzZLGiZORcaRnnd44pGTtI/MfGNu7If+jpHguXViO rTBQ== X-Gm-Message-State: AOAM531aPM4zWboeboqj/GyKT3rd9x3EPf3V5s0pkKnj9wtdOq41G4vO KG/a7TnC03lYudVibJT5bamZ+hhp13idzQ== X-Google-Smtp-Source: ABdhPJzMTBwZsb/Y2+eq6Msc5C1q7HCNQmFZGjUYpcaiSLsx7P7qjBYtUIoacUOMboWKq2Xmv13uQw== X-Received: by 2002:a17:90a:dd46:: with SMTP id u6mr3030119pjv.67.1601645682380; Fri, 02 Oct 2020 06:34:42 -0700 (PDT) Received: from shiro.work (p1268123-ipngn200803sizuokaden.shizuoka.ocn.ne.jp. [118.13.124.123]) by smtp.googlemail.com with ESMTPSA id k14sm1708219pjd.45.2020.10.02.06.34.39 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 02 Oct 2020 06:34:41 -0700 (PDT) From: Daniel Palmer List-Id: To: soc@kernel.org Cc: linux-arm-kernel@lists.infradead.org, devicetree@vger.kernel.org, mark-pk.tsai@mediatek.com, arnd@arndb.de, maz@kernel.org, Daniel Palmer Subject: [PATCH v2 3/5] ARM: mstar: Add interrupt to pm_uart Date: Fri, 2 Oct 2020 22:34:16 +0900 Message-Id: <20201002133418.2250277-4-daniel@0x0f.com> X-Mailer: git-send-email 2.27.0 In-Reply-To: <20201002133418.2250277-1-daniel@0x0f.com> References: <20201002133418.2250277-1-daniel@0x0f.com> MIME-Version: 1.0 Since we now have support for the interrupt controller pm_uart's interrupt is routed through it make sense to wire up it's interrupt in the device tree. The interrupt is the same for all known chips so it goes in the base dtsi. Signed-off-by: Daniel Palmer --- arch/arm/boot/dts/mstar-v7.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/mstar-v7.dtsi b/arch/arm/boot/dts/mstar-v7.dtsi index aec841b52ca4..f07880561e11 100644 --- a/arch/arm/boot/dts/mstar-v7.dtsi +++ b/arch/arm/boot/dts/mstar-v7.dtsi @@ -113,6 +113,7 @@ pm_uart: uart@221000 { compatible = "ns16550a"; reg = <0x221000 0x100>; reg-shift = <3>; + interrupts-extended = <&intc_irq GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; clock-frequency = <172000000>; status = "disabled"; };