| Message ID | 20210311152545.1317581-2-krzysztof.kozlowski@canonical.com (mailing list archive) |
|---|---|
| State | Queued, archived |
| Headers | show |
| Series | arm64 / clk: socfpga: simplifying, cleanups and compile testing | expand |
On 3/11/21 9:25 AM, Krzysztof Kozlowski wrote: > The Intel's eASIC N5X (ARCH_N5X) architecture shares a lot with Agilex > (ARCH_AGILEX) so it uses the same socfpga_agilex.dtsi, with minor > changes. Also the clock drivers are the same. > > However the clock drivers won't be build without ARCH_AGILEX. One could > assume that ARCH_N5X simply depends on ARCH_AGILEX but this was not > modeled in Kconfig. In current stage the ARCH_N5X is simply > unbootable. > > Add a separate Kconfig entry for clocks used by both ARCH_N5X and > ARCH_AGILEX so the necessary objects will be built if either of them is > selected. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > --- > drivers/clk/Kconfig | 1 + > drivers/clk/Makefile | 1 + > drivers/clk/socfpga/Kconfig | 6 ++++++ > drivers/clk/socfpga/Makefile | 4 ++-- > 4 files changed, 10 insertions(+), 2 deletions(-) > create mode 100644 drivers/clk/socfpga/Kconfig > > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig > index a588d56502d4..1d1891b9cad2 100644 > --- a/drivers/clk/Kconfig > +++ b/drivers/clk/Kconfig > @@ -394,6 +394,7 @@ source "drivers/clk/renesas/Kconfig" > source "drivers/clk/rockchip/Kconfig" > source "drivers/clk/samsung/Kconfig" > source "drivers/clk/sifive/Kconfig" > +source "drivers/clk/socfpga/Kconfig" > source "drivers/clk/sprd/Kconfig" > source "drivers/clk/sunxi/Kconfig" > source "drivers/clk/sunxi-ng/Kconfig" > diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile > index b22ae4f81e0b..12e46b12e587 100644 > --- a/drivers/clk/Makefile > +++ b/drivers/clk/Makefile > @@ -106,6 +106,7 @@ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ > obj-$(CONFIG_CLK_SIFIVE) += sifive/ > obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ > obj-$(CONFIG_ARCH_AGILEX) += socfpga/ > +obj-$(CONFIG_ARCH_N5X) += socfpga/ > obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ > obj-$(CONFIG_PLAT_SPEAR) += spear/ > obj-y += sprd/ > diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig > new file mode 100644 > index 000000000000..3c30617169bf > --- /dev/null > +++ b/drivers/clk/socfpga/Kconfig > @@ -0,0 +1,6 @@ > +# SPDX-License-Identifier: GPL-2.0 > +config CLK_INTEL_SOCFPGA64 > + bool > + # Intel Agilex / N5X clock controller support > + default (ARCH_AGILEX || ARCH_N5X) > + depends on ARCH_AGILEX || ARCH_N5X > diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile > index bf736f8d201a..c6db8dd4ab35 100644 > --- a/drivers/clk/socfpga/Makefile > +++ b/drivers/clk/socfpga/Makefile > @@ -3,5 +3,5 @@ obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o > obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o > obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o > obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o > -obj-$(CONFIG_ARCH_AGILEX) += clk-agilex.o > -obj-$(CONFIG_ARCH_AGILEX) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o > +obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-agilex.o > +obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o > Acked-by: Dinh Nguyen <dinguyen@kernel.org>
Quoting Krzysztof Kozlowski (2021-03-11 07:25:31) > The Intel's eASIC N5X (ARCH_N5X) architecture shares a lot with Agilex > (ARCH_AGILEX) so it uses the same socfpga_agilex.dtsi, with minor > changes. Also the clock drivers are the same. > > However the clock drivers won't be build without ARCH_AGILEX. One could > assume that ARCH_N5X simply depends on ARCH_AGILEX but this was not > modeled in Kconfig. In current stage the ARCH_N5X is simply > unbootable. > > Add a separate Kconfig entry for clocks used by both ARCH_N5X and > ARCH_AGILEX so the necessary objects will be built if either of them is > selected. > > Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> > --- Acked-by: Stephen Boyd <sboyd@kernel.org> FYI, Dinh sent some patches to change socfpga code to use clk_hw so it may conflict.
On 3/31/21 8:32 PM, Stephen Boyd wrote: > Quoting Krzysztof Kozlowski (2021-03-11 07:25:31) >> The Intel's eASIC N5X (ARCH_N5X) architecture shares a lot with Agilex >> (ARCH_AGILEX) so it uses the same socfpga_agilex.dtsi, with minor >> changes. Also the clock drivers are the same. >> >> However the clock drivers won't be build without ARCH_AGILEX. One could >> assume that ARCH_N5X simply depends on ARCH_AGILEX but this was not >> modeled in Kconfig. In current stage the ARCH_N5X is simply >> unbootable. >> >> Add a separate Kconfig entry for clocks used by both ARCH_N5X and >> ARCH_AGILEX so the necessary objects will be built if either of them is >> selected. >> >> Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> >> --- > > Acked-by: Stephen Boyd <sboyd@kernel.org> > > FYI, Dinh sent some patches to change socfpga code to use clk_hw so it > may conflict. > I just checked, no conflicts. Thanks Dinh
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig index a588d56502d4..1d1891b9cad2 100644 --- a/drivers/clk/Kconfig +++ b/drivers/clk/Kconfig @@ -394,6 +394,7 @@ source "drivers/clk/renesas/Kconfig" source "drivers/clk/rockchip/Kconfig" source "drivers/clk/samsung/Kconfig" source "drivers/clk/sifive/Kconfig" +source "drivers/clk/socfpga/Kconfig" source "drivers/clk/sprd/Kconfig" source "drivers/clk/sunxi/Kconfig" source "drivers/clk/sunxi-ng/Kconfig" diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile index b22ae4f81e0b..12e46b12e587 100644 --- a/drivers/clk/Makefile +++ b/drivers/clk/Makefile @@ -106,6 +106,7 @@ obj-$(CONFIG_COMMON_CLK_SAMSUNG) += samsung/ obj-$(CONFIG_CLK_SIFIVE) += sifive/ obj-$(CONFIG_ARCH_SOCFPGA) += socfpga/ obj-$(CONFIG_ARCH_AGILEX) += socfpga/ +obj-$(CONFIG_ARCH_N5X) += socfpga/ obj-$(CONFIG_ARCH_STRATIX10) += socfpga/ obj-$(CONFIG_PLAT_SPEAR) += spear/ obj-y += sprd/ diff --git a/drivers/clk/socfpga/Kconfig b/drivers/clk/socfpga/Kconfig new file mode 100644 index 000000000000..3c30617169bf --- /dev/null +++ b/drivers/clk/socfpga/Kconfig @@ -0,0 +1,6 @@ +# SPDX-License-Identifier: GPL-2.0 +config CLK_INTEL_SOCFPGA64 + bool + # Intel Agilex / N5X clock controller support + default (ARCH_AGILEX || ARCH_N5X) + depends on ARCH_AGILEX || ARCH_N5X diff --git a/drivers/clk/socfpga/Makefile b/drivers/clk/socfpga/Makefile index bf736f8d201a..c6db8dd4ab35 100644 --- a/drivers/clk/socfpga/Makefile +++ b/drivers/clk/socfpga/Makefile @@ -3,5 +3,5 @@ obj-$(CONFIG_ARCH_SOCFPGA) += clk.o clk-gate.o clk-pll.o clk-periph.o obj-$(CONFIG_ARCH_SOCFPGA) += clk-pll-a10.o clk-periph-a10.o clk-gate-a10.o obj-$(CONFIG_ARCH_STRATIX10) += clk-s10.o obj-$(CONFIG_ARCH_STRATIX10) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o -obj-$(CONFIG_ARCH_AGILEX) += clk-agilex.o -obj-$(CONFIG_ARCH_AGILEX) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o +obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-agilex.o +obj-$(CONFIG_CLK_INTEL_SOCFPGA64) += clk-pll-s10.o clk-periph-s10.o clk-gate-s10.o
The Intel's eASIC N5X (ARCH_N5X) architecture shares a lot with Agilex (ARCH_AGILEX) so it uses the same socfpga_agilex.dtsi, with minor changes. Also the clock drivers are the same. However the clock drivers won't be build without ARCH_AGILEX. One could assume that ARCH_N5X simply depends on ARCH_AGILEX but this was not modeled in Kconfig. In current stage the ARCH_N5X is simply unbootable. Add a separate Kconfig entry for clocks used by both ARCH_N5X and ARCH_AGILEX so the necessary objects will be built if either of them is selected. Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@canonical.com> --- drivers/clk/Kconfig | 1 + drivers/clk/Makefile | 1 + drivers/clk/socfpga/Kconfig | 6 ++++++ drivers/clk/socfpga/Makefile | 4 ++-- 4 files changed, 10 insertions(+), 2 deletions(-) create mode 100644 drivers/clk/socfpga/Kconfig