| Message ID | 20210407161333.73013-2-krzysztof.kozlowski@canonical.com (mailing list archive) |
|---|---|
| State | Mainlined, archived |
| Commit | d8d5cbc619e86b8f2167ae40d029a9d07e97b303 |
| Headers | show |
| Series | [GIT,PULL,1/2] memory: drivers for v5.13 | expand |
From: Arnd Bergmann <arnd@arndb.de> On Wed, 7 Apr 2021 18:13:33 +0200, Krzysztof Kozlowski wrote: > The following changes since commit a38fd8748464831584a19438cbb3082b5a2dab15: > > Linux 5.12-rc2 (2021-03-05 17:33:41 -0800) > > are available in the Git repository at: > > https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl.git tags/memory-controller-drv-tegra-5.13 > > [...] Merged into arm/drivers, thanks! merge commit: 0a8e73301d2b071a9e4ceb1901773502d50b897a Arnd
The following changes since commit a38fd8748464831584a19438cbb3082b5a2dab15: Linux 5.12-rc2 (2021-03-05 17:33:41 -0800) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl.git tags/memory-controller-drv-tegra-5.13 for you to fetch changes up to d8d5cbc619e86b8f2167ae40d029a9d07e97b303: dt-bindings: memory: tegra20: mc: Convert to schema (2021-04-01 19:58:22 +0200) ---------------------------------------------------------------- Memory controller drivers for v5.13 - Tegra SoC 1. Few cleanups. 2. Add debug statistics to Tegra20 memory controller. 3. Update bindings and convert to dtschema. This update is not backwards compatible (ABI break) however the broken part was added recently (v5.11) and there are no users of it yet. ---------------------------------------------------------------- Dmitry Osipenko (8): memory: tegra20: Add debug statistics memory: tegra20: Correct comment to MC_STAT registers writes memory: tegra20: Protect debug code with a lock memory: tegra: Print out info-level once per driver probe dt-bindings: memory: tegra20: emc: Replace core regulator with power domain dt-bindings: memory: tegra30: emc: Replace core regulator with power domain dt-bindings: memory: tegra124: emc: Replace core regulator with power domain dt-bindings: memory: tegra20: mc: Convert to schema Yang Li (1): memory: tegra: replace DEFINE_SIMPLE_ATTRIBUTE with DEFINE_DEBUGFS_ATTRIBUTE .../memory-controllers/nvidia,tegra124-emc.yaml | 7 +- .../memory-controllers/nvidia,tegra20-emc.txt | 4 +- .../memory-controllers/nvidia,tegra20-mc.txt | 40 --- .../memory-controllers/nvidia,tegra20-mc.yaml | 79 +++++ .../memory-controllers/nvidia,tegra30-emc.yaml | 7 +- drivers/memory/tegra/mc.c | 9 + drivers/memory/tegra/mc.h | 4 +- drivers/memory/tegra/tegra124-emc.c | 16 +- drivers/memory/tegra/tegra20-emc.c | 20 +- drivers/memory/tegra/tegra20.c | 332 +++++++++++++++++++++ drivers/memory/tegra/tegra30-emc.c | 18 +- include/soc/tegra/mc.h | 7 + 12 files changed, 466 insertions(+), 77 deletions(-) delete mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.txt create mode 100644 Documentation/devicetree/bindings/memory-controllers/nvidia,tegra20-mc.yaml