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Mon, 24 Jan 2022 04:20:23 +0900 (KST) Received: from Jaguar.sa.corp.samsungelectronics.net (unknown [107.108.73.139]) by epsmtip1.samsung.com (KnoxPortal) with ESMTPA id 20220123192021epsmtip169b5fd0ed4131d068fffdabbb8624cc9~M-IcSFqGX0799807998epsmtip1F; Sun, 23 Jan 2022 19:20:21 +0000 (GMT) From: Alim Akhtar To: linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org List-Id: Cc: soc@kernel.org, linux-clk@vger.kernel.org, devicetree@vger.kernel.org, olof@lixom.net, arnd@arndb.de, linus.walleij@linaro.org, catalin.marinas@arm.com, robh+dt@kernel.org, krzysztof.kozlowski@canonical.com, s.nawrocki@samsung.com, linux-samsung-soc@vger.kernel.org, pankaj.dubey@samsung.com, sboyd@kernel.org, Alim Akhtar , linux-fsd@tesla.com, Ajay Kumar Subject: [PATCH v4 12/16] pinctrl: samsung: add FSD SoC specific data Date: Mon, 24 Jan 2022 00:37:25 +0530 Message-Id: <20220123190729.1852-13-alim.akhtar@samsung.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20220123190729.1852-1-alim.akhtar@samsung.com> X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFprHJsWRmVeSWpSXmKPExsWy7bCmpm7FqreJBme69SwOvD/IYvFg3jY2 i7+TjrFbvF/Ww2gx/8g5VouNb38wWUz5s5zJYtPja6wWH3vusVo8fBVucXnXHDaLGef3MVmc uv6ZzWLR1i/sFq17j7BbHH7Tzmrx79pGFovH1/+wOQh5rJm3htHj969JjB6zGnrZPDat6mTz uHNtD5vH5iX1HldONLF69G1Zxejxr2kuu8fnTXIBXFHZNhmpiSmpRQqpecn5KZl56bZK3sHx zvGmZgaGuoaWFuZKCnmJuam2Si4+AbpumTlATykplCXmlAKFAhKLi5X07WyK8ktLUhUy8otL bJVSC1JyCkwK9IoTc4tL89L18lJLrAwNDIxMgQoTsjOu3e1hKfiqUfHoU1wD417lLkZODgkB E4mWl82sXYxcHEICuxkldp2ZyALhfGKU2HxrFZTzmVGi4+hNxi5GDrCW2Veg4rsYJVYvO8wM 4bQwSXQe2M4EMpdNQFvi7vQtYLaIgJvEjcYOJpAiZoEVzBI9q76BJYQFXCVaz19kAbFZBFQl 1v87zwyygVfARmL17EqI++QlVm84wAxicwKFe199ALtVQuAAh0TnrYMsEBe5SFzq04eoF5Z4 dXwLO4QtJfH53V42iJJsiZ5dxhDhGoml846xQNj2EgeuzAGbwiygKbF+F9gUZgE+id7fT5gg OnklOtqEIKpVJZrfXYXqlJaY2N3NCmF7SOz4dYEJEgr9jBLb965gn8AoOwth6gJGxlWMkqkF xbnpqcWmBcZ5qeXwWErOz93ECE6oWt47GB89+KB3iJGJg/EQowQHs5IIb0H+q0Qh3pTEyqrU ovz4otKc1OJDjKbAAJvILCWanA9M6Xkl8YYmlgYmZmZmJpbGZoZK4ryn0jckCgmkJ5akZqem FqQWwfQxcXBKNTA9Xnn/QYkI78qAS6ZvrpyZyKjzusPu7WZZPp6vazcVSi5a3J0kYqC0YvHG v7nRy93vcfb1dx9OP9NiLn2zetpsW79YubmuXx7+fOVjMe/Th1M2z5+FfIxd0Hfgo56+0KYE Vabux5t/HlB9Ym2sbt/dsbJh0p+308pNAqOyLswIy/3fMc8p5/aqz9Wqh/eubfeMmyvPHzlh 2uyAb1yiEUGdGyymM6n7P5Oqvn+7o+RIW5xi4c7Ddx9/E5O1lvsvqhaQ38D1uYnl96+5/ht0 ed7+enzj2hz3L/ZPwypnHXjVOFX0ZgOfAd9Ow/Add7elrP1mrfOH47HItetsjJdK5BvUXhiE WbQu2j7TWlGvNHOlEktxRqKhFnNRcSIAybN5ozEEAAA= X-Brightmail-Tracker: H4sIAAAAAAAAA+NgFnrELMWRmVeSWpSXmKPExsWy7bCSnG75qreJBqu3KFkceH+QxeLBvG1s Fn8nHWO3eL+sh9Fi/pFzrBYb3/5gspjyZzmTxabH11gtPvbcY7V4+Crc4vKuOWwWM87vY7I4 df0zm8WirV/YLVr3HmG3OPymndXi37WNLBaPr/9hcxDyWDNvDaPH71+TGD1mNfSyeWxa1cnm cefaHjaPzUvqPa6caGL16NuyitHjX9Ncdo/Pm+QCuKK4bFJSczLLUov07RK4Mq7d7WEp+KpR 8ehTXAPjXuUuRg4OCQETidlXWLoYuTiEBHYwSpyeuZGxi5ETKC4tcX3jBHYIW1hi5b/n7BBF TUwSV6+2s4Ek2AS0Je5O38IEYosIeEi0/bvHDFLELLCLWaK78wRYQljAVaL1/EUWEJtFQFVi /b/zzCCbeQVsJFbProRYIC+xesMBZhCbEyjc++oDK0iJkIC1xISjchMY+RYwMqxilEwtKM5N zy02LDDKSy3XK07MLS7NS9dLzs/dxAiOBi2tHYx7Vn3QO8TIxMF4iFGCg1lJhLcg/1WiEG9K YmVValF+fFFpTmrxIUZpDhYlcd4LXSfjhQTSE0tSs1NTC1KLYLJMHJxSDUwLVQ97FW3/6jXZ p9v4rQnnQ/0VTesmvGN419P74GPvazlm3Rsd8b5/9kcV/qxdsDLizQTDdTq7y4o+b7y6QzC9 5mfx3h03IgJN3/+3n6+07PThORYrTBU3NcffzQ9kz1s5JafP5pUhm2OmziqGVxM0eN4GCHZc 9FLgFb24v11q16Tml09vexQeEVeW3Mn4cOvf48lz1vhISL5yN13y66XjfAu/2u0TD8ztmj9p J1u2xB3HKUJd66wOsLRrJRlcZM75rV/mtflzs0zhEZa4+ACNRL6/m6+/arh3ZYPIntomdhnj L8rxK4J9MtwfZzQdir92u+97RbfSj6e+mUYhKTPO7Muw28XA9OPVsdLcVbZKLMUZiYZazEXF iQCwnOnx9QIAAA== X-CMS-MailID: 20220123192023epcas5p2daf1cc38e042a6dce8b0271026065715 X-Msg-Generator: CA CMS-TYPE: 105P DLP-Filter: Pass X-CFilter-Loop: Reflected X-CMS-RootMailID: 20220123192023epcas5p2daf1cc38e042a6dce8b0271026065715 References: <20220123190729.1852-1-alim.akhtar@samsung.com> Adds Tesla FSD SoC specific data to enable pinctrl. FSD SoC has similar pinctrl controller as found in the most Samsung/Exynos SoCs. Cc: linux-fsd@tesla.com Acked-by: Linus Walleij Signed-off-by: Ajay Kumar Signed-off-by: Alim Akhtar --- .../pinctrl/samsung/pinctrl-exynos-arm64.c | 71 +++++++++++++++++++ drivers/pinctrl/samsung/pinctrl-samsung.c | 2 + drivers/pinctrl/samsung/pinctrl-samsung.h | 1 + 3 files changed, 74 insertions(+) diff --git a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c index 4102ce955bd7..d291819c2f77 100644 --- a/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c +++ b/drivers/pinctrl/samsung/pinctrl-exynos-arm64.c @@ -725,3 +725,74 @@ const struct samsung_pinctrl_of_match_data exynosautov9_of_data __initconst = { .ctrl = exynosautov9_pin_ctrl, .num_ctrl = ARRAY_SIZE(exynosautov9_pin_ctrl), }; + +/* + * Pinctrl driver data for Tesla FSD SoC. FSD SoC includes three + * gpio/pin-mux/pinconfig controllers. + */ + +/* pin banks of FSD pin-controller 0 (FSYS) */ +static const struct samsung_pin_bank_data fsd_pin_banks0[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(7, 0x00, "gpf0", 0x00), + EXYNOS850_PIN_BANK_EINTG(8, 0x20, "gpf1", 0x04), + EXYNOS850_PIN_BANK_EINTG(3, 0x40, "gpf6", 0x08), + EXYNOS850_PIN_BANK_EINTG(2, 0x60, "gpf4", 0x0c), + EXYNOS850_PIN_BANK_EINTG(6, 0x80, "gpf5", 0x10), +}; + +/* pin banks of FSD pin-controller 1 (PERIC) */ +static const struct samsung_pin_bank_data fsd_pin_banks1[] __initconst = { + EXYNOS850_PIN_BANK_EINTG(4, 0x000, "gpc8", 0x00), + EXYNOS850_PIN_BANK_EINTG(7, 0x020, "gpf2", 0x04), + EXYNOS850_PIN_BANK_EINTG(8, 0x040, "gpf3", 0x08), + EXYNOS850_PIN_BANK_EINTG(8, 0x060, "gpd0", 0x0c), + EXYNOS850_PIN_BANK_EINTG(8, 0x080, "gpb0", 0x10), + EXYNOS850_PIN_BANK_EINTG(8, 0x0a0, "gpb1", 0x14), + EXYNOS850_PIN_BANK_EINTG(8, 0x0c0, "gpb4", 0x18), + EXYNOS850_PIN_BANK_EINTG(4, 0x0e0, "gpb5", 0x1c), + EXYNOS850_PIN_BANK_EINTG(8, 0x100, "gpb6", 0x20), + EXYNOS850_PIN_BANK_EINTG(8, 0x120, "gpb7", 0x24), + EXYNOS850_PIN_BANK_EINTG(5, 0x140, "gpd1", 0x28), + EXYNOS850_PIN_BANK_EINTG(5, 0x160, "gpd2", 0x2c), + EXYNOS850_PIN_BANK_EINTG(7, 0x180, "gpd3", 0x30), + EXYNOS850_PIN_BANK_EINTG(8, 0x1a0, "gpg0", 0x34), + EXYNOS850_PIN_BANK_EINTG(8, 0x1c0, "gpg1", 0x38), + EXYNOS850_PIN_BANK_EINTG(8, 0x1e0, "gpg2", 0x3c), + EXYNOS850_PIN_BANK_EINTG(8, 0x200, "gpg3", 0x40), + EXYNOS850_PIN_BANK_EINTG(8, 0x220, "gpg4", 0x44), + EXYNOS850_PIN_BANK_EINTG(8, 0x240, "gpg5", 0x48), + EXYNOS850_PIN_BANK_EINTG(8, 0x260, "gpg6", 0x4c), + EXYNOS850_PIN_BANK_EINTG(8, 0x280, "gpg7", 0x50), +}; + +/* pin banks of FSD pin-controller 2 (PMU) */ +static const struct samsung_pin_bank_data fsd_pin_banks2[] __initconst = { + EXYNOS850_PIN_BANK_EINTN(3, 0x00, "gpq0"), +}; + +const struct samsung_pin_ctrl fsd_pin_ctrl[] __initconst = { + { + /* pin-controller instance 0 FSYS0 data */ + .pin_banks = fsd_pin_banks0, + .nr_banks = ARRAY_SIZE(fsd_pin_banks0), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 1 PERIC data */ + .pin_banks = fsd_pin_banks1, + .nr_banks = ARRAY_SIZE(fsd_pin_banks1), + .eint_gpio_init = exynos_eint_gpio_init, + .suspend = exynos_pinctrl_suspend, + .resume = exynos_pinctrl_resume, + }, { + /* pin-controller instance 2 PMU data */ + .pin_banks = fsd_pin_banks2, + .nr_banks = ARRAY_SIZE(fsd_pin_banks2), + }, +}; + +const struct samsung_pinctrl_of_match_data fsd_of_data __initconst = { + .ctrl = fsd_pin_ctrl, + .num_ctrl = ARRAY_SIZE(fsd_pin_ctrl), +}; diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.c b/drivers/pinctrl/samsung/pinctrl-samsung.c index 568b6e65dfed..f610beab23a0 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.c +++ b/drivers/pinctrl/samsung/pinctrl-samsung.c @@ -1320,6 +1320,8 @@ static const struct of_device_id samsung_pinctrl_dt_match[] = { .data = &exynos850_of_data }, { .compatible = "samsung,exynosautov9-pinctrl", .data = &exynosautov9_of_data }, + { .compatible = "tesla,fsd-pinctrl", + .data = &fsd_of_data }, #endif #ifdef CONFIG_PINCTRL_S3C64XX { .compatible = "samsung,s3c64xx-pinctrl", diff --git a/drivers/pinctrl/samsung/pinctrl-samsung.h b/drivers/pinctrl/samsung/pinctrl-samsung.h index 1f8d30ba05af..5b32d3f30fcd 100644 --- a/drivers/pinctrl/samsung/pinctrl-samsung.h +++ b/drivers/pinctrl/samsung/pinctrl-samsung.h @@ -342,6 +342,7 @@ extern const struct samsung_pinctrl_of_match_data exynos7_of_data; extern const struct samsung_pinctrl_of_match_data exynos7885_of_data; extern const struct samsung_pinctrl_of_match_data exynos850_of_data; extern const struct samsung_pinctrl_of_match_data exynosautov9_of_data; +extern const struct samsung_pinctrl_of_match_data fsd_of_data; extern const struct samsung_pinctrl_of_match_data s3c64xx_of_data; extern const struct samsung_pinctrl_of_match_data s3c2412_of_data; extern const struct samsung_pinctrl_of_match_data s3c2416_of_data;