| Message ID | 20220519232317.16079-1-dinguyen@kernel.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 8eecf1c9929aef24e9e75280a39ed1ba3c64fb71 |
| Headers | show |
| Series | [GIT,PULL] ARM: socfpga: updates for v5.19 | expand |
Hello: This pull request was applied to soc/soc.git (for-next) by Arnd Bergmann <arnd@arndb.de>: On Thu, 19 May 2022 18:23:17 -0500 you wrote: > Hi Arnd/Olof, > > Please pull in these updates for v5.19. > > Thanks, > Dinh > > [...] Here is the summary with links: - [GIT,PULL] ARM: socfpga: updates for v5.19 https://git.kernel.org/soc/soc/c/8eecf1c9929a You are awesome, thank you!
Hi Arnd/Olof, Please pull in these updates for v5.19. Thanks, Dinh The following changes since commit 3123109284176b1532874591f7c81f3837bbdc17: Linux 5.18-rc1 (2022-04-03 14:08:21 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux.git tags/socfpga_dts_updates_for_v5.19 for you to fetch changes up to 22511e665eadc2c49021886d07aaef39db90ca82: arm64: dts: intel: add device tree for n6000 (2022-05-19 18:13:25 -0500) ---------------------------------------------------------------- SoCFPGA dts updates for v5.19 - dtschema fix SPI NOR node - correct dt-bindings doc for Altera gpio driver - add support for n6000 Agilex platform and dt-bindings documentation ---------------------------------------------------------------- Dinh Nguyen (1): dt-bindings: gpio: altera: correct interrupt-cells Krzysztof Kozlowski (1): ARM: dts: socfpga: align SPI NOR node name with dtschema Matthew Gerlach (3): dt-bindings: soc: add bindings for Intel HPS Copy Engine dt-bindings: intel: add binding for Intel n6000 arm64: dts: intel: add device tree for n6000 .../devicetree/bindings/arm/intel,socfpga.yaml | 1 + .../devicetree/bindings/gpio/gpio-altera.txt | 5 +- .../bindings/soc/intel/intel,hps-copy-engine.yaml | 51 +++++++++++++++++ arch/arm/boot/dts/socfpga_arria10_socdk_qspi.dts | 2 +- arch/arm/boot/dts/socfpga_cyclone5_socdk.dts | 2 +- arch/arm/boot/dts/socfpga_cyclone5_sodia.dts | 2 +- arch/arm/boot/dts/socfpga_cyclone5_vining_fpga.dts | 4 +- arch/arm64/boot/dts/intel/Makefile | 3 +- arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts | 66 ++++++++++++++++++++++ 9 files changed, 128 insertions(+), 8 deletions(-) create mode 100644 Documentation/devicetree/bindings/soc/intel/intel,hps-copy-engine.yaml create mode 100644 arch/arm64/boot/dts/intel/socfpga_agilex_n6000.dts