| Message ID | 20220923143519.41735-1-p.zabel@pengutronix.de (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 2653853e2a2a21a9b87d976044863cf776035b8e |
| Headers | show |
| Series | [GIT,PULL] Reset controller fixes for v6.0 | expand |
Hello: This pull request was applied to soc/soc.git (arm/fixes) by Arnd Bergmann <arnd@arndb.de>: On Fri, 23 Sep 2022 16:35:19 +0200 you wrote: > Dear arm-soc maintainers, > > The following changes since commit 568035b01cfb107af8d2e4bd2fb9aea22cf5b868: > > Linux 6.0-rc1 (2022-08-14 15:50:18 -0700) > > are available in the Git repository at: > > [...] Here is the summary with links: - [GIT,PULL] Reset controller fixes for v6.0 https://git.kernel.org/soc/soc/c/2653853e2a2a You are awesome, thank you!
Dear arm-soc maintainers, The following changes since commit 568035b01cfb107af8d2e4bd2fb9aea22cf5b868: Linux 6.0-rc1 (2022-08-14 15:50:18 -0700) are available in the Git repository at: git://git.pengutronix.de/pza/linux.git tags/reset-fixes-for-v6.0 for you to fetch changes up to ae358d71d4623ed0a466a7498f8ce25c7fda22d1: reset: npcm: fix iprst2 and iprst4 setting (2022-09-22 17:48:35 +0200) ---------------------------------------------------------------- Reset controller fixes for v6.0 Fix the i.MX8MP PCIe PHY PERST bit polarity, issue the Sparx5 "switch" reset (which turned out to be a rather more global reset) early on startup, stubbing out the reset controller driver, and fix the NPCM8XX USB reset sequence by setting IPSRST4 bits in the correct register. ---------------------------------------------------------------- Michael Walle (1): reset: microchip-sparx5: issue a reset on startup Richard Zhu (1): reset: imx7: Fix the iMX8MP PCIe PHY PERST support Tomer Maimon (1): reset: npcm: fix iprst2 and iprst4 setting drivers/reset/reset-imx7.c | 1 + drivers/reset/reset-microchip-sparx5.c | 22 +++++++++++++++++----- drivers/reset/reset-npcm.c | 2 +- 3 files changed, 19 insertions(+), 6 deletions(-)