[GIT,PULL,4/7] Renesas DT binding updates for v6.2 (take two)

Message ID	cover.1668788927.git.geert+renesas@glider.be (mailing list archive)
State	Accepted
Commit	f241625bb3aeb8aab3e2f67848456d55da529564
Headers	show Return-Path: <SRS0=KCga=3S=linux-m68k.org=geert@kernel.org> DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.kernel.org 55F79C433C1 From: Geert Uytterhoeven <geert+renesas@glider.be> To: arm-soc <arm@kernel.org>, soc <soc@kernel.org> Cc: Magnus Damm <magnus.damm@gmail.com>, linux-arm-kernel@lists.infradead.org, linux-renesas-soc@vger.kernel.org, Geert Uytterhoeven <geert+renesas@glider.be> Subject: [GIT PULL 4/7] Renesas DT binding updates for v6.2 (take two) Date: Fri, 18 Nov 2022 17:45:01 +0100 Message-Id: <cover.1668788927.git.geert+renesas@glider.be> In-Reply-To: <cover.1668788918.git.geert+renesas@glider.be> References: <cover.1668788918.git.geert+renesas@glider.be> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit
Series	Renesas SoC updates for v6.2 (take two) \| expand [GIT,PULL,0/7] Renesas SoC updates for v6.2 (take two) [GIT,PULL,1/7] Renesas ARM defconfig updates for v6.2 [GIT,PULL,2/7] Renesas ARM DT updates for v6.2 (take two) [GIT,PULL,3/7] Renesas driver updates for v6.2 (take two) [GIT,PULL,4/7] Renesas DT binding updates for v6.2 (take two) [GIT,PULL,5/7] Renesas RISC-V defconfig updates for v6.2 [GIT,PULL,6/7] Renesas RISC-V DT updates for v6.2 [GIT,PULL,7/7] Renesas RISC-V SoC updates for v6.2

Message ID

cover.1668788927.git.geert+renesas@glider.be (mailing list archive)

State

Accepted

Commit

f241625bb3aeb8aab3e2f67848456d55da529564

Headers

DMARC-Filter: OpenDMARC Filter v1.4.1 smtp.kernel.org 55F79C433C1
From: Geert Uytterhoeven <geert+renesas@glider.be>
To: arm-soc <arm@kernel.org>,
	soc <soc@kernel.org>
Cc: Magnus Damm <magnus.damm@gmail.com>,
	linux-arm-kernel@lists.infradead.org,
	linux-renesas-soc@vger.kernel.org,
	Geert Uytterhoeven <geert+renesas@glider.be>
Subject: [GIT PULL 4/7] Renesas DT binding updates for v6.2 (take two)
Date: Fri, 18 Nov 2022 17:45:01 +0100
Message-Id: <cover.1668788927.git.geert+renesas@glider.be>
In-Reply-To: <cover.1668788918.git.geert+renesas@glider.be>
References: <cover.1668788918.git.geert+renesas@glider.be>
MIME-Version: 1.0
Content-Transfer-Encoding: 8bit

Series

Renesas SoC updates for v6.2 (take two) | expand

Message

Geert Uytterhoeven Nov. 18, 2022, 4:45 p.m. UTC

The following changes since commit 7dd1d57c052e88f98b9e9145461b13bca019d108:

  dt-bindings: soc: renesas: renesas.yaml: Document Renesas RZ/Five SoC (2022-10-28 14:43:12 +0200)

are available in the Git repository at:

  git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel.git tags/renesas-dt-bindings-for-v6.2-tag2

for you to fetch changes up to a884f187760ee0c6033296aa50845e2d1e0e8430:

  dt-bindings: arm: renesas: Document Renesas RZ/V2M System Configuration (2022-11-17 20:18:21 +0100)

----------------------------------------------------------------
Renesas DT binding updates for v6.2 (take two)

  - Document support for the Andes Technology AX45MP RISC-V CPU Core, as
    used on the Renesas RZ/Five SoC,
  - Document support for the Renesas RZ/V2M System Configuration.

----------------------------------------------------------------
Lad Prabhakar (2):
      dt-bindings: riscv: Sort the CPU core list alphabetically
      dt-bindings: riscv: Add Andes AX45MP core to the list

Phil Edworthy (1):
      dt-bindings: arm: renesas: Document Renesas RZ/V2M System Configuration

 Documentation/devicetree/bindings/riscv/cpus.yaml  | 11 +++---
 .../soc/renesas/renesas,r9a09g011-sys.yaml         | 43 ++++++++++++++++++++++
 2 files changed, 49 insertions(+), 5 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/soc/renesas/renesas,r9a09g011-sys.yaml

[GIT,PULL,4/7] Renesas DT binding updates for v6.2 (take two)

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