From patchwork Wed Jan 22 01:41:18 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Hayes Wang X-Patchwork-Id: 11344853 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 123336C1 for ; Wed, 22 Jan 2020 01:44:07 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EE85624676 for ; Wed, 22 Jan 2020 01:44:06 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1729159AbgAVBnz (ORCPT ); Tue, 21 Jan 2020 20:43:55 -0500 Received: from rtits2.realtek.com ([211.75.126.72]:56888 "EHLO rtits2.realtek.com.tw" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728899AbgAVBnz (ORCPT ); Tue, 21 Jan 2020 20:43:55 -0500 Authenticated-By: X-SpamFilter-By: BOX Solutions SpamTrap 5.62 with qID 00M1hjvP020137, This message is accepted by code: ctloc85258 Received: from mail.realtek.com (RTITCASV02.realtek.com.tw[172.21.6.19]) by rtits2.realtek.com.tw (8.15.2/2.57/5.78) with ESMTPS id 00M1hjvP020137 (version=TLSv1 cipher=DHE-RSA-AES256-SHA bits=256 verify=NOT); Wed, 22 Jan 2020 09:43:47 +0800 Received: from fc30.localdomain (172.21.177.138) by RTITCASV02.realtek.com.tw (172.21.6.19) with Microsoft SMTP Server id 14.3.468.0; Wed, 22 Jan 2020 09:43:10 +0800 From: Hayes Wang To: CC: , , , , , Hayes Wang Subject: [PATCH net v2 6/9] r8152: disable test IO for RTL8153B Date: Wed, 22 Jan 2020 09:41:18 +0800 Message-ID: <1394712342-15778-354-Taiwan-albertk@realtek.com> X-Mailer: Microsoft Office Outlook 11 In-Reply-To: <1394712342-15778-348-Taiwan-albertk@realtek.com> References: <1394712342-15778-338-Taiwan-albertk@realtek.com> <1394712342-15778-348-Taiwan-albertk@realtek.com> MIME-Version: 1.0 X-Originating-IP: [172.21.177.138] Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org For RTL8153B with QFN32, disable test IO. Otherwise, it may casue abnormal behavior for the device randomly. Signed-off-by: Hayes Wang --- drivers/net/usb/r8152.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/net/usb/r8152.c b/drivers/net/usb/r8152.c index 1fb85c79bd33..7efeddad1fc8 100644 --- a/drivers/net/usb/r8152.c +++ b/drivers/net/usb/r8152.c @@ -312,6 +312,7 @@ /* PLA_PHY_PWR */ #define TX_10M_IDLE_EN 0x0080 #define PFM_PWM_SWITCH 0x0040 +#define TEST_IO_OFF BIT(4) /* PLA_MAC_PWR_CTRL */ #define D3_CLK_GATED_EN 0x00004000 @@ -5538,6 +5539,15 @@ static void r8153b_init(struct r8152 *tp) ocp_data &= ~PLA_MCU_SPDWN_EN; ocp_write_word(tp, MCU_TYPE_PLA, PLA_MAC_PWR_CTRL3, ocp_data); + if (tp->version == RTL_VER_09) { + /* Disable Test IO for 32QFN */ + if (ocp_read_byte(tp, MCU_TYPE_PLA, 0xdc00) & BIT(5)) { + ocp_data = ocp_read_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR); + ocp_data |= TEST_IO_OFF; + ocp_write_word(tp, MCU_TYPE_PLA, PLA_PHY_PWR, ocp_data); + } + } + set_bit(GREEN_ETHERNET, &tp->flags); /* rx aggregation */