From patchwork Wed May 16 13:48:55 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Jon Hunter X-Patchwork-Id: 10404015 Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E45AB601C8 for ; Wed, 16 May 2018 13:49:42 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D311328931 for ; Wed, 16 May 2018 13:49:42 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id C742E28949; Wed, 16 May 2018 13:49:42 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00, MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=unavailable version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 4DCD128931 for ; Wed, 16 May 2018 13:49:42 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752483AbeEPNtM (ORCPT ); Wed, 16 May 2018 09:49:12 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:13518 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752411AbeEPNtJ (ORCPT ); Wed, 16 May 2018 09:49:09 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com id ; Wed, 16 May 2018 06:49:06 -0700 Received: from HQMAIL103.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Wed, 16 May 2018 06:49:08 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Wed, 16 May 2018 06:49:08 -0700 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL103.nvidia.com (172.20.187.11) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 16 May 2018 13:49:08 +0000 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1347.2; Wed, 16 May 2018 13:49:08 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1347.2 via Frontend Transport; Wed, 16 May 2018 13:49:08 +0000 Received: from moonraker.nvidia.com (Not Verified[10.21.132.148]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7, 5, 8, 10121) id ; Wed, 16 May 2018 06:49:08 -0700 From: Jon Hunter To: Mathias Nyman , Greg Kroah-Hartman , Thierry Reding CC: , , , Jon Hunter Subject: [PATCH V3 3/3] usb: xhci: tegra: Add support for managing powergates Date: Wed, 16 May 2018 14:48:55 +0100 Message-ID: <1526478535-23760-3-git-send-email-jonathanh@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1526478535-23760-1-git-send-email-jonathanh@nvidia.com> References: <1526478535-23760-1-git-send-email-jonathanh@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP The Tegra XHCI controller requires that the XUSBA (for superspeed) and XUSBC (for host) power-domains are enabled. Commit 8df127456f29 ("soc/tegra: pmc: Enable XUSB partitions on boot") was added to force on these power-domains if the XHCI driver is enabled while proper power-domain support is added, to ensure the device did not hang on boot. However, rather than forcing on these power-domains in the PMC driver we can use the legacy Tegra powergate APIs to turn on these power-domains during the probe of the Tegra XHCI driver. In the near future we plan to move the Tegra XHCI driver to use the generic PM domain framework for power-domains and so to prepare for this only use the legacy Tegra powergate API if there is not PM domain associated with device (ie. dev.pm_domain is NULL). Please note that in the future the superspeed and host resets will be handled by the generic PM domain provider and so these are only these are only needed in the case where there is no generic PM domain. Signed-off-by: Jon Hunter Acked-by: Thierry Reding --- Changes since V2: - Add Thierry's ACK Changes since V1: - None drivers/usb/host/xhci-tegra.c | 68 +++++++++++++++++++++++++++++++------------ 1 file changed, 49 insertions(+), 19 deletions(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 437e08010587..c78fc2942bca 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -22,6 +22,7 @@ #include #include #include +#include #include "xhci.h" @@ -974,20 +975,6 @@ static int tegra_xusb_probe(struct platform_device *pdev) if (IS_ERR(tegra->padctl)) return PTR_ERR(tegra->padctl); - tegra->host_rst = devm_reset_control_get(&pdev->dev, "xusb_host"); - if (IS_ERR(tegra->host_rst)) { - err = PTR_ERR(tegra->host_rst); - dev_err(&pdev->dev, "failed to get xusb_host reset: %d\n", err); - goto put_padctl; - } - - tegra->ss_rst = devm_reset_control_get(&pdev->dev, "xusb_ss"); - if (IS_ERR(tegra->ss_rst)) { - err = PTR_ERR(tegra->ss_rst); - dev_err(&pdev->dev, "failed to get xusb_ss reset: %d\n", err); - goto put_padctl; - } - tegra->host_clk = devm_clk_get(&pdev->dev, "xusb_host"); if (IS_ERR(tegra->host_clk)) { err = PTR_ERR(tegra->host_clk); @@ -1051,11 +1038,48 @@ static int tegra_xusb_probe(struct platform_device *pdev) goto put_padctl; } + if (!pdev->dev.pm_domain) { + tegra->host_rst = devm_reset_control_get(&pdev->dev, + "xusb_host"); + if (IS_ERR(tegra->host_rst)) { + err = PTR_ERR(tegra->host_rst); + dev_err(&pdev->dev, + "failed to get xusb_host reset: %d\n", err); + goto put_padctl; + } + + tegra->ss_rst = devm_reset_control_get(&pdev->dev, "xusb_ss"); + if (IS_ERR(tegra->ss_rst)) { + err = PTR_ERR(tegra->ss_rst); + dev_err(&pdev->dev, "failed to get xusb_ss reset: %d\n", + err); + goto put_padctl; + } + + err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_XUSBA, + tegra->ss_clk, + tegra->ss_rst); + if (err) { + dev_err(&pdev->dev, + "failed to enable XUSBA domain: %d\n", err); + goto put_padctl; + } + + err = tegra_powergate_sequence_power_up(TEGRA_POWERGATE_XUSBC, + tegra->host_clk, + tegra->host_rst); + if (err) { + dev_err(&pdev->dev, + "failed to enable XUSBC domain: %d\n", err); + goto disable_xusba; + } + } + tegra->supplies = devm_kcalloc(&pdev->dev, tegra->soc->num_supplies, sizeof(*tegra->supplies), GFP_KERNEL); if (!tegra->supplies) { err = -ENOMEM; - goto put_padctl; + goto disable_xusbc; } for (i = 0; i < tegra->soc->num_supplies; i++) @@ -1065,7 +1089,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) tegra->supplies); if (err) { dev_err(&pdev->dev, "failed to get regulators: %d\n", err); - goto put_padctl; + goto disable_xusbc; } for (i = 0; i < tegra->soc->num_types; i++) @@ -1075,7 +1099,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) sizeof(*tegra->phys), GFP_KERNEL); if (!tegra->phys) { err = -ENOMEM; - goto put_padctl; + goto disable_xusbc; } for (i = 0, k = 0; i < tegra->soc->num_types; i++) { @@ -1091,7 +1115,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) "failed to get PHY %s: %ld\n", prop, PTR_ERR(phy)); err = PTR_ERR(phy); - goto put_padctl; + goto disable_xusbc; } tegra->phys[k++] = phy; @@ -1102,7 +1126,7 @@ static int tegra_xusb_probe(struct platform_device *pdev) dev_name(&pdev->dev)); if (!tegra->hcd) { err = -ENOMEM; - goto put_padctl; + goto disable_xusbc; } /* @@ -1198,6 +1222,12 @@ static int tegra_xusb_probe(struct platform_device *pdev) disable_rpm: pm_runtime_disable(&pdev->dev); usb_put_hcd(tegra->hcd); +disable_xusbc: + if (!&pdev->dev.pm_domain) + tegra_powergate_power_off(TEGRA_POWERGATE_XUSBC); +disable_xusba: + if (!&pdev->dev.pm_domain) + tegra_powergate_power_off(TEGRA_POWERGATE_XUSBA); put_padctl: tegra_xusb_padctl_put(tegra->padctl); return err;