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Wed, 25 Jul 2018 04:51:45 -0700 Received: from [127.0.0.1] (helo=localhost) by xsj-pvapsmtp01 with smtp (Exim 4.63) (envelope-from ) id 1fiIKR-0006Z7-TQ; Wed, 25 Jul 2018 04:51:39 -0700 Received: from xsj-pvapsmtp01 (mailhost.xilinx.com [149.199.38.66]) by xsj-smtp-dlp1.xlnx.xilinx.com (8.13.8/8.13.1) with ESMTP id w6PBpa2P027042; Wed, 25 Jul 2018 04:51:36 -0700 Received: from [172.23.64.8] (helo=xhdvnc108.xilinx.com) by xsj-pvapsmtp01 with esmtp (Exim 4.63) (envelope-from ) id 1fiIKO-0006Ye-5h; Wed, 25 Jul 2018 04:51:36 -0700 Received: by xhdvnc108.xilinx.com (Postfix, from userid 15427) id 50E7460504; Wed, 25 Jul 2018 17:21:35 +0530 (IST) From: Anurag Kumar Vulisha To: , CC: , , , Anurag Kumar Vulisha Subject: [PATCH 1/8] usb: dwc3: Correct the logic for checking TRB full in __dwc3_prepare_one_trb() Date: Wed, 25 Jul 2018 17:21:24 +0530 Message-ID: <1532519491-19502-2-git-send-email-anurag.kumar.vulisha@xilinx.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1532519491-19502-1-git-send-email-anurag.kumar.vulisha@xilinx.com> References: <1532519491-19502-1-git-send-email-anurag.kumar.vulisha@xilinx.com> X-RCIS-Action: ALLOW X-TM-AS-Product-Ver: IMSS-7.1.0.1224-8.2.0.1013-23620.005 X-TM-AS-User-Approved-Sender: Yes;Yes X-EOPAttributedMessage: 0 X-MS-Office365-Filtering-HT: Tenant X-Forefront-Antispam-Report: CIP:149.199.60.100;IPV:NLI;CTRY:US;EFV:NLI;SFV:NSPM;SFS:(10009020)(136003)(376002)(396003)(39860400002)(346002)(2980300002)(438002)(189003)(199004)(51416003)(36756003)(50226002)(50466002)(76176011)(47776003)(446003)(81166006)(103686004)(6666003)(8936002)(336012)(11346002)(81156014)(305945005)(356003)(426003)(476003)(186003)(126002)(2616005)(107886003)(6266002)(36386004)(15760500003)(54906003)(90966002)(106466001)(63266004)(8676002)(26005)(106002)(478600001)(5660300001)(486006)(316002)(52956003)(110136005)(42186006)(4326008)(2906002)(16586007)(39060400002)(48376002)(107986001)(5001870100001);DIR:OUT;SFP:1101;SCL:1;SRVR:BY2PR02MB089;H:xsj-pvapsmtpgw02;FPR:;SPF:Pass;LANG:en;PTR:unknown-60-100.xilinx.com,xapps1.xilinx.com;MX:1;A:1; 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The number of available TRBs are calculated using dwc3_calc_trbs_left(), which determines TRBs full or not based on HWO bit set in the TRB. During preparation of TRB __dwc3_prepare_one_trb() is always called with a TRB which doesn't have HWO bit set. __dwc3_prepare_one_trb() depends on dwc3_calc_trbs_left() to calculate the free available TRBs and set IOC bit if not available. Since dwc3_calc_trbs_left() determines TRB available based on HWO bit, there are chances that dwc3_calc_trbs_left() wrongly calculates the present working TRB as free TRB (since HWO bit is not yet set). This patch corrects this issue by setting HWO bit before calling dwc3_calc_trbs_left(). Signed-off-by: Anurag Kumar Vulisha --- drivers/usb/dwc3/gadget.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/usb/dwc3/gadget.c b/drivers/usb/dwc3/gadget.c index 69bf137..f73d219 100644 --- a/drivers/usb/dwc3/gadget.c +++ b/drivers/usb/dwc3/gadget.c @@ -990,6 +990,8 @@ static void __dwc3_prepare_one_trb(struct dwc3_ep *dep, struct dwc3_trb *trb, trb->ctrl |= DWC3_TRB_CTRL_ISP_IMI; } + trb->ctrl |= DWC3_TRB_CTRL_HWO; + if ((!no_interrupt && !chain) || (dwc3_calc_trbs_left(dep) == 0)) trb->ctrl |= DWC3_TRB_CTRL_IOC; @@ -1000,8 +1002,6 @@ static void __dwc3_prepare_one_trb(struct dwc3_ep *dep, struct dwc3_trb *trb, if (usb_endpoint_xfer_bulk(dep->endpoint.desc) && dep->stream_capable) trb->ctrl |= DWC3_TRB_CTRL_SID_SOFN(stream_id); - trb->ctrl |= DWC3_TRB_CTRL_HWO; - trace_dwc3_prepare_trb(dep, trb); }