From patchwork Fri Aug 23 09:47:23 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nagarjuna Kristam X-Patchwork-Id: 11111169 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id C37A813B1 for ; Fri, 23 Aug 2019 09:48:16 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id A2069233FE for ; Fri, 23 Aug 2019 09:48:16 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="RtoVp3IM" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2393995AbfHWJsM (ORCPT ); Fri, 23 Aug 2019 05:48:12 -0400 Received: from hqemgate16.nvidia.com ([216.228.121.65]:8549 "EHLO hqemgate16.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S2389129AbfHWJsL (ORCPT ); Fri, 23 Aug 2019 05:48:11 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqemgate16.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Fri, 23 Aug 2019 02:48:11 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Fri, 23 Aug 2019 02:48:11 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Fri, 23 Aug 2019 02:48:11 -0700 Received: from HQMAIL107.nvidia.com (172.20.187.13) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Fri, 23 Aug 2019 09:48:10 +0000 Received: from hqnvemgw02.nvidia.com (172.16.227.111) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Fri, 23 Aug 2019 09:48:10 +0000 Received: from nkristam-ubuntu.nvidia.com (Not Verified[10.19.65.118]) by hqnvemgw02.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Fri, 23 Aug 2019 02:48:10 -0700 From: Nagarjuna Kristam To: , , , , , , CC: , , , , Nagarjuna Kristam Subject: [Patch V7 5/8] arm64: tegra: Add xudc node for Tegra210 Date: Fri, 23 Aug 2019 15:17:23 +0530 Message-ID: <1566553646-15338-6-git-send-email-nkristam@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1566553646-15338-1-git-send-email-nkristam@nvidia.com> References: <1566553646-15338-1-git-send-email-nkristam@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1566553692; bh=q0M5Gc1mkimDBK7Ykg1QnyBRB1lOKTLjMP2xt1WkSuw=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=RtoVp3IMjO6SiC0LYLdO/NbhkQqTzpP1bcLOWClrwPjsrKnq+kp5FsmDvZiB++eWj R34rd3kmtV5Z5K+C/Mxu6xPo6xSsbnc74AXcgFVLWF+i1LGQ2M0PlIoVCP+SF3AgWd nFBasG9wnYHf0dR+H9zbzUCm5gKgzgtQddcQBzLvS+jvyDiqmmfRiDVUQ0iDxsMRmx b1cx5dXNsvlpaCKY18xdWfnfrw9vOWSskP2IrSjJDGRQ/3Pn+sJWHOGdDYQNuf3Em7 wqngJ4ySQ5wdtOdX4691O2e9Z0PFZ2ptWDjcIkQnhYE4ltpJEXB3/xZHfY+aVNEyDd JsuWxdzoPKHUw== Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Tegra210 has one XUSB device mode controller, which can be operated HS and SS modes. Add DT support for XUSB device mode controller. Signed-off-by: Nagarjuna Kristam Reviewed-by: JC Kuo --- arch/arm64/boot/dts/nvidia/tegra210.dtsi | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/arch/arm64/boot/dts/nvidia/tegra210.dtsi b/arch/arm64/boot/dts/nvidia/tegra210.dtsi index 6597531..5de0b36 100644 --- a/arch/arm64/boot/dts/nvidia/tegra210.dtsi +++ b/arch/arm64/boot/dts/nvidia/tegra210.dtsi @@ -1203,6 +1203,25 @@ status = "disabled"; }; + usb@700d0000 { + compatible = "nvidia,tegra210-xudc"; + reg = <0x0 0x700d0000 0x0 0x8000>, + <0x0 0x700d8000 0x0 0x1000>, + <0x0 0x700d9000 0x0 0x1000>; + reg-names = "base", "fpci", "ipfs"; + interrupts = ; + clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>, + <&tegra_car TEGRA210_CLK_XUSB_SS>, + <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>, + <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>; + clock-names = "dev", "ss", "ss_src", "hs_src", "fs_src"; + power-domains = <&pd_xusbdev>, <&pd_xusbss>; + power-domain-names = "dev", "ss"; + nvidia,xusb-padctl = <&padctl>; + status = "disabled"; + }; + mipi: mipi@700e3000 { compatible = "nvidia,tegra210-mipi"; reg = <0x0 0x700e3000 0x0 0x100>;