From patchwork Wed Dec 18 09:16:17 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nagarjuna Kristam X-Patchwork-Id: 11300011 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 952F36C1 for ; Wed, 18 Dec 2019 09:17:11 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 6A3AA24680 for ; Wed, 18 Dec 2019 09:17:11 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="BmypH3rQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726813AbfLRJRH (ORCPT ); Wed, 18 Dec 2019 04:17:07 -0500 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:7998 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726757AbfLRJRH (ORCPT ); Wed, 18 Dec 2019 04:17:07 -0500 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Wed, 18 Dec 2019 01:16:57 -0800 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Wed, 18 Dec 2019 01:17:06 -0800 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Wed, 18 Dec 2019 01:17:06 -0800 Received: from HQMAIL101.nvidia.com (172.20.187.10) by HQMAIL107.nvidia.com (172.20.187.13) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 18 Dec 2019 09:17:05 +0000 Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL101.nvidia.com (172.20.187.10) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 18 Dec 2019 09:17:05 +0000 Received: from nkristam-ubuntu.nvidia.com (Not Verified[10.19.64.167]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Wed, 18 Dec 2019 01:17:05 -0800 From: Nagarjuna Kristam To: , , , , , , CC: , , , , Nagarjuna Kristam Subject: [Patch V2 04/18] phy: tegra: xusb: Add usb-phy support Date: Wed, 18 Dec 2019 14:46:17 +0530 Message-ID: <1576660591-10383-5-git-send-email-nkristam@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1576660591-10383-1-git-send-email-nkristam@nvidia.com> References: <1576660591-10383-1-git-send-email-nkristam@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1576660617; bh=c1fS/HfesAEgOY1XyJ1A0jPa5GIhTsNLoVnJZg0VmlE=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=BmypH3rQGlfVhKv9fFxEtFlAdXiO2ZD05YtMSF5cygLr9lyrd6der5gf9r3p7mNnA GhwXdefEVnATnnSrb5stNlxur9njpaBmp5IqkOSw3OZg59Vhcg55mk8vATg/V8yQsG 9p2uES2xSKa7MJONrBbmEg72aiKhSs1vLw0k+4xa72LX4FbIso7KjEbvxfVySOfMjV kbU5SVuB2d8AHky9XQvKOuZdzvUHUrHu1AxKAZu2MVHw3Aay19BjOM9LXwdUGusWGX ufUEN7ZkcUZ4O6B+zJtUJBW3qCAV1g0crlp7RVRoeJbkd43GirABEiS9s3tF0WjvLz cYKJLGIEaoVww== Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org For USB 2 ports that has usb-role-switch enabled, add usb-phy for corresponding USB 2 phy. USB role changes from role switch are then updated to corresponding host and device mode drivers via usb-phy notifier block. Signed-off-by: Nagarjuna Kristam --- V2: - Added dev_set_drvdata for port->dev. --- drivers/phy/tegra/xusb.c | 71 ++++++++++++++++++++++++++++++++++++++++++++++++ drivers/phy/tegra/xusb.h | 2 ++ 2 files changed, 73 insertions(+) diff --git a/drivers/phy/tegra/xusb.c b/drivers/phy/tegra/xusb.c index dc00b42..5bde8f1 100644 --- a/drivers/phy/tegra/xusb.c +++ b/drivers/phy/tegra/xusb.c @@ -533,6 +533,8 @@ static int tegra_xusb_port_init(struct tegra_xusb_port *port, if (err < 0) goto unregister; + dev_set_drvdata(&port->dev, port); + return 0; unregister: @@ -545,6 +547,8 @@ static void tegra_xusb_port_unregister(struct tegra_xusb_port *port) if (!IS_ERR_OR_NULL(port->usb_role_sw)) { of_platform_depopulate(&port->dev); usb_role_switch_unregister(port->usb_role_sw); + cancel_work_sync(&port->usb_phy_work); + usb_remove_phy(&port->usb_phy); } device_unregister(&port->dev); } @@ -556,16 +560,59 @@ static const char *const modes[] = { [USB_DR_MODE_OTG] = "otg", }; +static void tegra_xusb_usb_phy_work(struct work_struct *work) +{ + struct tegra_xusb_port *port = container_of(work, + struct tegra_xusb_port, usb_phy_work); + enum usb_role role = usb_role_switch_get_role(port->usb_role_sw); + + dev_dbg(&port->dev, "%s calling notifier for role %d\n", __func__, + role); + + atomic_notifier_call_chain(&port->usb_phy.notifier, role, + &port->usb_phy); +} + static int tegra_xusb_role_sw_set(struct device *dev, enum usb_role role) { + struct tegra_xusb_port *port = dev_get_drvdata(dev); + dev_dbg(dev, "%s calling notifier for role is %d\n", __func__, role); + schedule_work(&port->usb_phy_work); + + return 0; +} + +static int tegra_xusb_set_peripheral(struct usb_otg *otg, + struct usb_gadget *gadget) +{ + struct tegra_xusb_port *port = container_of(otg->usb_phy, + struct tegra_xusb_port, usb_phy); + + if (gadget != NULL) + schedule_work(&port->usb_phy_work); + + return 0; +} + +static int tegra_xusb_set_host(struct usb_otg *otg, struct usb_bus *host) +{ + struct tegra_xusb_port *port = container_of(otg->usb_phy, + struct tegra_xusb_port, usb_phy); + + if (host != NULL) + schedule_work(&port->usb_phy_work); + return 0; } + static int tegra_xusb_setup_usb_role_switch(struct tegra_xusb_port *port) { int err = 0; + struct tegra_xusb_lane *lane = tegra_xusb_find_lane(port->padctl, + "usb2", port->index); struct usb_role_switch_desc role_sx_desc = { .set = tegra_xusb_role_sw_set, .fwnode = dev_fwnode(&port->dev), @@ -578,6 +625,30 @@ static int tegra_xusb_setup_usb_role_switch(struct tegra_xusb_port *port) if (err != EPROBE_DEFER) dev_err(&port->dev, "Failed to register USB role SW: %d", err); + return err; + } + + INIT_WORK(&port->usb_phy_work, tegra_xusb_usb_phy_work); + + port->usb_phy.otg = devm_kzalloc(&port->dev, + sizeof(struct usb_otg), GFP_KERNEL); + if (!port->usb_phy.otg) + return -ENOMEM; + + /* + * Assign phy dev to usb-phy dev. Host/device drivers can use phy + * reference to retrieve usb-phy details. + */ + port->usb_phy.dev = &lane->pad->lanes[port->index]->dev; + port->usb_phy.dev->driver = port->padctl->dev->driver; + port->usb_phy.otg->usb_phy = &port->usb_phy; + port->usb_phy.otg->set_peripheral = tegra_xusb_set_peripheral; + port->usb_phy.otg->set_host = tegra_xusb_set_host; + + err = usb_add_phy_dev(&port->usb_phy); + if (err < 0) { + dev_err(&port->dev, "Failed to add usbphy: %d\n", err); + return err; } /* populate connector entry */ diff --git a/drivers/phy/tegra/xusb.h b/drivers/phy/tegra/xusb.h index 9f27899..2345657 100644 --- a/drivers/phy/tegra/xusb.h +++ b/drivers/phy/tegra/xusb.h @@ -268,6 +268,8 @@ struct tegra_xusb_port { struct device dev; struct usb_role_switch *usb_role_sw; + struct work_struct usb_phy_work; + struct usb_phy usb_phy; const struct tegra_xusb_port_ops *ops; };