From patchwork Wed Mar 18 10:31:02 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Nagarjuna Kristam X-Patchwork-Id: 11444875 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AFAFD6CA for ; Wed, 18 Mar 2020 10:32:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 85FCB20770 for ; Wed, 18 Mar 2020 10:32:25 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=nvidia.com header.i=@nvidia.com header.b="GaIsT7VT" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727790AbgCRKbv (ORCPT ); Wed, 18 Mar 2020 06:31:51 -0400 Received: from hqnvemgate26.nvidia.com ([216.228.121.65]:7074 "EHLO hqnvemgate26.nvidia.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726550AbgCRKbv (ORCPT ); Wed, 18 Mar 2020 06:31:51 -0400 Received: from hqpgpgate101.nvidia.com (Not Verified[216.228.121.13]) by hqnvemgate26.nvidia.com (using TLS: TLSv1.2, DES-CBC3-SHA) id ; Wed, 18 Mar 2020 03:31:37 -0700 Received: from hqmail.nvidia.com ([172.20.161.6]) by hqpgpgate101.nvidia.com (PGP Universal service); Wed, 18 Mar 2020 03:31:50 -0700 X-PGP-Universal: processed; by hqpgpgate101.nvidia.com on Wed, 18 Mar 2020 03:31:50 -0700 Received: from HQMAIL109.nvidia.com (172.20.187.15) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3; Wed, 18 Mar 2020 10:31:49 +0000 Received: from rnnvemgw01.nvidia.com (10.128.109.123) by HQMAIL109.nvidia.com (172.20.187.15) with Microsoft SMTP Server (TLS) id 15.0.1473.3 via Frontend Transport; Wed, 18 Mar 2020 10:31:49 +0000 Received: from nkristam-ubuntu.nvidia.com (Not Verified[10.19.67.128]) by rnnvemgw01.nvidia.com with Trustwave SEG (v7,5,8,10121) id ; Wed, 18 Mar 2020 03:31:48 -0700 From: Nagarjuna Kristam To: , , , , , CC: , , , , , Nagarjuna Kristam Subject: [PATCH V1 3/8] phy: tegra: xusb: Add support for UTMI pad power control Date: Wed, 18 Mar 2020 16:01:02 +0530 Message-ID: <1584527467-8058-4-git-send-email-nkristam@nvidia.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1584527467-8058-1-git-send-email-nkristam@nvidia.com> References: <1584527467-8058-1-git-send-email-nkristam@nvidia.com> X-NVConfidentiality: public MIME-Version: 1.0 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=nvidia.com; s=n1; t=1584527497; bh=5n0CB6+N0wWq3YuDt7V474LuTLsFSCLbkbolggwEtl0=; h=X-PGP-Universal:From:To:CC:Subject:Date:Message-ID:X-Mailer: In-Reply-To:References:X-NVConfidentiality:MIME-Version: Content-Type; b=GaIsT7VT6+W2jhKLtktGqekdUDOfSJrMqGaI+gWZlaPcqKIxoW6VmBoCEwxzi1CKf QerVF3GT7VhKQ7w3uSP08X7YsmVBGhtOx7bBAWqHg8SFCgWx1zRQw2K6E3ib9fPnT9 XA6aD3DTLltUuPAVMv4OTXAh0zVNn4Ob62XOIhzHfgkntbvSAiYWdxRo2uishcD3DJ AQ7za6149JjtTy4MaBQJ1ltvtIRB6VuYJbQPx022Rylci8VMS6fdgWrRi8YdqVV0p9 hPzcoaZg9SjNN86b2M/8njmYSSdXUWtjfsxW6HUGaGXUz/fTE562YWwY6eyCgeuWf1 /8CwKxfngHEGg== Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Add support for UTMI pad power on and off API's via soc ops. These API can be used by operations like charger detect to power on and off UTMI pad if needed. Update powered_on flag in the pad power control API's. Signed-off-by: Nagarjuna Kristam --- drivers/phy/tegra/xusb-tegra186.c | 51 ++++++++++++++++++--------------------- drivers/phy/tegra/xusb.h | 2 ++ 2 files changed, 26 insertions(+), 27 deletions(-) diff --git a/drivers/phy/tegra/xusb-tegra186.c b/drivers/phy/tegra/xusb-tegra186.c index fa700e5..18ed3d6 100644 --- a/drivers/phy/tegra/xusb-tegra186.c +++ b/drivers/phy/tegra/xusb-tegra186.c @@ -192,12 +192,8 @@ static void tegra186_utmi_bias_pad_power_on(struct tegra_xusb_padctl *padctl) u32 value; int err; - mutex_lock(&padctl->lock); - - if (priv->bias_pad_enable++ > 0) { - mutex_unlock(&padctl->lock); + if (priv->bias_pad_enable++ > 0) return; - } err = clk_prepare_enable(priv->usb2_trk_clk); if (err < 0) @@ -221,8 +217,6 @@ static void tegra186_utmi_bias_pad_power_on(struct tegra_xusb_padctl *padctl) value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); value &= ~USB2_PD_TRK; padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); - - mutex_unlock(&padctl->lock); } static void tegra186_utmi_bias_pad_power_off(struct tegra_xusb_padctl *padctl) @@ -230,44 +224,29 @@ static void tegra186_utmi_bias_pad_power_off(struct tegra_xusb_padctl *padctl) struct tegra186_xusb_padctl *priv = to_tegra186_xusb_padctl(padctl); u32 value; - mutex_lock(&padctl->lock); - - if (WARN_ON(priv->bias_pad_enable == 0)) { - mutex_unlock(&padctl->lock); + if (WARN_ON(priv->bias_pad_enable == 0)) return; - } - if (--priv->bias_pad_enable > 0) { - mutex_unlock(&padctl->lock); + if (--priv->bias_pad_enable > 0) return; - } value = padctl_readl(padctl, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); value |= USB2_PD_TRK; padctl_writel(padctl, value, XUSB_PADCTL_USB2_BIAS_PAD_CTL1); clk_disable_unprepare(priv->usb2_trk_clk); - - mutex_unlock(&padctl->lock); } static void tegra_phy_xusb_utmi_pad_power_on(struct phy *phy) { struct tegra_xusb_lane *lane = phy_get_drvdata(phy); struct tegra_xusb_padctl *padctl = lane->pad->padctl; - struct tegra_xusb_usb2_port *port; - struct device *dev = padctl->dev; + struct tegra_xusb_usb2_lane *usb2 = to_usb2_lane(lane); unsigned int index = lane->index; u32 value; - if (!phy) - return; - - port = tegra_xusb_find_usb2_port(padctl, index); - if (!port) { - dev_err(dev, "no port found for USB2 lane %u\n", index); + if (!phy || usb2->powered_on) return; - } tegra186_utmi_bias_pad_power_on(padctl); @@ -280,16 +259,19 @@ static void tegra_phy_xusb_utmi_pad_power_on(struct phy *phy) value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); value &= ~USB2_OTG_PD_DR; padctl_writel(padctl, value, XUSB_PADCTL_USB2_OTG_PADX_CTL1(index)); + + usb2->powered_on = true; } static void tegra_phy_xusb_utmi_pad_power_down(struct phy *phy) { struct tegra_xusb_lane *lane = phy_get_drvdata(phy); struct tegra_xusb_padctl *padctl = lane->pad->padctl; + struct tegra_xusb_usb2_lane *usb2 = to_usb2_lane(lane); unsigned int index = lane->index; u32 value; - if (!phy) + if (!phy || !usb2->powered_on) return; value = padctl_readl(padctl, XUSB_PADCTL_USB2_OTG_PADX_CTL0(index)); @@ -303,6 +285,8 @@ static void tegra_phy_xusb_utmi_pad_power_down(struct phy *phy) udelay(2); tegra186_utmi_bias_pad_power_off(padctl); + + usb2->powered_on = false; } static int tegra186_xusb_padctl_vbus_override(struct tegra_xusb_padctl *padctl, @@ -413,6 +397,8 @@ static int tegra186_utmi_phy_power_on(struct phy *phy) return -ENODEV; } + mutex_lock(&padctl->lock); + value = padctl_readl(padctl, XUSB_PADCTL_USB2_PAD_MUX); value &= ~(USB2_PORT_MASK << USB2_PORT_SHIFT(index)); value |= (PORT_XUSB << USB2_PORT_SHIFT(index)); @@ -464,14 +450,23 @@ static int tegra186_utmi_phy_power_on(struct phy *phy) /* TODO: pad power saving */ tegra_phy_xusb_utmi_pad_power_on(phy); + + mutex_unlock(&padctl->lock); return 0; } static int tegra186_utmi_phy_power_off(struct phy *phy) { + struct tegra_xusb_lane *lane = phy_get_drvdata(phy); + struct tegra_xusb_padctl *padctl = lane->pad->padctl; + + mutex_lock(&padctl->lock); + /* TODO: pad power saving */ tegra_phy_xusb_utmi_pad_power_down(phy); + mutex_unlock(&padctl->lock); + return 0; } @@ -934,6 +929,8 @@ static const struct tegra_xusb_padctl_ops tegra186_xusb_padctl_ops = { .probe = tegra186_xusb_padctl_probe, .remove = tegra186_xusb_padctl_remove, .vbus_override = tegra186_xusb_padctl_vbus_override, + .utmi_pad_power_on = tegra_phy_xusb_utmi_pad_power_on, + .utmi_pad_power_down = tegra_phy_xusb_utmi_pad_power_down, }; #if IS_ENABLED(CONFIG_ARCH_TEGRA_186_SOC) diff --git a/drivers/phy/tegra/xusb.h b/drivers/phy/tegra/xusb.h index 51d7aae..ba5ee88 100644 --- a/drivers/phy/tegra/xusb.h +++ b/drivers/phy/tegra/xusb.h @@ -381,6 +381,8 @@ struct tegra_xusb_padctl_ops { unsigned int index, bool enable); int (*vbus_override)(struct tegra_xusb_padctl *padctl, bool set); int (*utmi_port_reset)(struct phy *phy); + void (*utmi_pad_power_on)(struct phy *phy); + void (*utmi_pad_power_down)(struct phy *phy); }; struct tegra_xusb_padctl_soc {