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Tue, 9 Jun 2020 11:23:33 +0000 From: Li Jun To: balbi@kernel.org, shawnguo@kernel.org Cc: gregkh@linuxfoundation.org, robh+dt@kernel.org, s.hauer@pengutronix.de, kernel@pengutronix.de, festevam@gmail.com, linux-imx@nxp.com, linux-usb@vger.kernel.org, linux-arm-kernel@lists.infradead.org, peter.chen@nxp.com Subject: [PATCH 1/6] dt-bindings: usb: dwc3: add property to disable xhci 64bit support Date: Tue, 9 Jun 2020 19:12:40 +0800 Message-Id: <1591701165-12872-2-git-send-email-jun.li@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1591701165-12872-1-git-send-email-jun.li@nxp.com> References: <1591701165-12872-1-git-send-email-jun.li@nxp.com> X-ClientProxiedBy: SG2PR02CA0069.apcprd02.prod.outlook.com (2603:1096:4:54::33) To VE1PR04MB6528.eurprd04.prod.outlook.com (2603:10a6:803:127::18) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by SG2PR02CA0069.apcprd02.prod.outlook.com (2603:1096:4:54::33) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.3066.18 via Frontend Transport; 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X-MS-Exchange-AntiSpam-MessageData: yt4j/eLc0PELDZrJO/bNPwz3gjAm7QANAOd55xkPzqZHM2t9RxPbCzevNgXvTsPBrtAEcq0xprbnvXWQNRtYwwfgcktu0OOWgMr+JsqRPU2kwxtYLuit3xP6ZTthJIAKRkxvyWeOKJt8kPv9L9R/0ASlBSQS91mzQSSmY9XabD96l6vP8mK4jxSkAffeYwJX9E05xZB/aKYoxVMD+k/bi1ViM60EwSKescwjVIJSbDUBVQj9lpXJuzvmlhsqWDzGthAd0qzdzqvlXa0klE6Cep4MMDhJa+DAWslNKTiyJwpRXAKPbrrrCPFnz9M8g5x95e3Wk22tqRSP8au5/0EUKBBhlfHdPQflifLW+ljz9dbuBWwGDan1sQV3nyxdlWwE+y0J8eoc/X0xHC9ylLO/E1SaxeR3soiJqxJMtLpYDb5et5JkyoO7ZwsbIyE/F7WMvWJSqqh7Bj1wZ6ua3sbBoBseZrznSAJbmbtuwnmUVqo= X-OriginatorOrg: nxp.com X-MS-Exchange-CrossTenant-Network-Message-Id: c22d46b9-71ae-44ab-d7c6-08d80c678b85 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 09 Jun 2020 11:23:33.8182 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 686ea1d3-bc2b-4c6f-a92c-d99c5c301635 X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: jF+Hrzgk4oF7GhVYu7IbKr0hUCKehPcWZZeuA2wk1mpLx5iHz/+gmltItiZoHVNt X-MS-Exchange-Transport-CrossTenantHeadersStamped: VE1PR04MB6589 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Add a property "snps,xhci-dis-64bit-support-quirk" to disable xhci 64bit address support, this is due to SoC integration can't support it but the AC64 bit (bit 0) of HCCPARAMS1 is set to be 1. Signed-off-by: Li Jun --- Documentation/devicetree/bindings/usb/dwc3.txt | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/usb/dwc3.txt b/Documentation/devicetree/bindings/usb/dwc3.txt index d03edf9..d16cba7 100644 --- a/Documentation/devicetree/bindings/usb/dwc3.txt +++ b/Documentation/devicetree/bindings/usb/dwc3.txt @@ -109,6 +109,9 @@ Optional properties: When just one value, which means INCRX burst mode enabled. When more than one value, which means undefined length INCR burst type enabled. The values can be 1, 4, 8, 16, 32, 64, 128 and 256. + - snps,xhci-dis-64bit-support-quirk: set if the AC64 bit (bit 0) of HCCPARAMS1 is set + to be 1, but the controller actually can't handle 64-bit address + due to SoC integration. - in addition all properties from usb-xhci.txt from the current directory are supported as well