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Wed, 19 May 2021 07:31:57 +0000 From: Li Jun To: heikki.krogerus@linux.intel.com, robh+dt@kernel.org, shawnguo@kernel.org Cc: gregkh@linuxfoundation.org, linux@roeck-us.net, linux-usb@vger.kernel.org, linux-imx@nxp.com, jun.li@nxp.com, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH 4/4] arm64: dts: imx8mp-evk: enable usb0 with typec connector Date: Wed, 19 May 2021 15:14:50 +0800 Message-Id: <1621408490-23811-5-git-send-email-jun.li@nxp.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1621408490-23811-1-git-send-email-jun.li@nxp.com> References: <1621408490-23811-1-git-send-email-jun.li@nxp.com> X-Originating-IP: [119.31.174.66] X-ClientProxiedBy: SG2PR01CA0142.apcprd01.prod.exchangelabs.com (2603:1096:4:8f::22) To VI1PR04MB5935.eurprd04.prod.outlook.com (2603:10a6:803:e9::17) MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 Received: from localhost.localdomain (119.31.174.66) by SG2PR01CA0142.apcprd01.prod.exchangelabs.com (2603:1096:4:8f::22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256) id 15.20.4129.32 via Frontend Transport; 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Signed-off-by: Li Jun --- arch/arm64/boot/dts/freescale/imx8mp-evk.dts | 110 +++++++++++++++++++ 1 file changed, 110 insertions(+) diff --git a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts index 2c28e589677e..c69514910eb9 100644 --- a/arch/arm64/boot/dts/freescale/imx8mp-evk.dts +++ b/arch/arm64/boot/dts/freescale/imx8mp-evk.dts @@ -5,6 +5,7 @@ /dts-v1/; +#include #include "imx8mp.dtsi" / { @@ -65,6 +66,22 @@ reg_usdhc2_vmmc: regulator-usdhc2 { gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; enable-active-high; }; + + mux: mux-controller { + compatible = "gpio-mux"; + #mux-control-cells = <0>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_typec_mux>; + mux-gpios = <&gpio4 20 GPIO_ACTIVE_HIGH>, + <&gpio2 20 GPIO_ACTIVE_HIGH>; + idle-state = <2>; + + port { + usb3_data_ss: endpoint { + remote-endpoint = <&typec_con_ss>; + }; + }; + }; }; &flexcan1 { @@ -104,6 +121,56 @@ ethphy1: ethernet-phy@1 { }; }; +&i2c2 { + clock-frequency = <400000>; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_i2c2>; + status = "okay"; + + ptn5110: tcpc@50 { + compatible = "nxp,ptn5110"; + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_typec>; + reg = <0x50>; + interrupt-parent = <&gpio4>; + interrupts = <19 8>; + + port { + typec_dr_sw: endpoint { + remote-endpoint = <&usb3_drd_sw>; + }; + }; + + usb_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + power-role = "dual"; + data-role = "dual"; + try-power-role = "sink"; + source-pdos = ; + sink-pdos = ; + op-sink-microwatt = <15000000>; + self-powered; + mux-controls = <&mux>; + mux-control-names = "typec-orientation-switch"; + mux-control-switch-states = <2>, <0>, <1>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@1 { + reg = <1>; + typec_con_ss: endpoint { + remote-endpoint = <&usb3_data_ss>; + }; + }; + }; + }; + }; +}; + &i2c3 { clock-frequency = <400000>; pinctrl-names = "default"; @@ -137,6 +204,29 @@ &usb3_1 { status = "okay"; }; +&usb3_phy0 { + status = "okay"; +}; + +&usb3_0 { + status = "okay"; +}; + +&usb_dwc3_0 { + dr_mode = "otg"; + hnp-disable; + srp-disable; + adp-disable; + usb-role-switch; + status = "okay"; + + port { + usb3_drd_sw: endpoint { + remote-endpoint = <&typec_dr_sw>; + }; + }; +}; + &usb_dwc3_1 { pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usb1_vbus>; @@ -229,6 +319,13 @@ MX8MP_IOMUXC_NAND_READY_B__GPIO3_IO16 0x19 >; }; + pinctrl_i2c2: i2c2grp { + fsl,pins = < + MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c3 + MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c3 + >; + }; + pinctrl_i2c3: i2c3grp { fsl,pins = < MX8MP_IOMUXC_I2C3_SCL__I2C3_SCL 0x400001c3 @@ -242,6 +339,19 @@ MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x41 >; }; + pinctrl_typec: typec1grp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x1c4 + >; + }; + + pinctrl_typec_mux: typec1muxgrp { + fsl,pins = < + MX8MP_IOMUXC_SAI1_MCLK__GPIO4_IO20 0x16 + MX8MP_IOMUXC_SD2_WP__GPIO2_IO20 0x16 + >; + }; + pinctrl_uart2: uart2grp { fsl,pins = < MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x49