diff mbox series

[v5,2/5] usb: phy: Workaround for USB erratum-A005728

Message ID 20190508060608.33882-2-yinbo.zhu@nxp.com (mailing list archive)
State Superseded
Headers show
Series [v5,1/5] usb: fsl: Set USB_EN bit to select ULPI phy | expand

Commit Message

Yinbo Zhu May 8, 2019, 6:04 a.m. UTC 
From: Suresh Gupta <B42813@freescale.com>

PHY_CLK_VALID bit for UTMI PHY in USBDR does not set even
if PHY is providing valid clock. Workaround for this
involves resetting of PHY and check PHY_CLK_VALID bit
multiple times. If PHY_CLK_VALID bit is still not set even
after 5 retries, it would be safe to deaclare that PHY
clock is not available.
This erratum is applicable for USBDR less then ver 2.4.

Signed-off-by: Suresh Gupta <B42813@freescale.com>
Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
---
Change in v5:
		remove dev_err function unnecessary parameters 

 drivers/usb/host/ehci-fsl.c |   37 ++++++++++++++++++++++++++-----------
 drivers/usb/host/ehci-fsl.h |    3 +++
 2 files changed, 29 insertions(+), 11 deletions(-)

Comments

Alan Stern May 8, 2019, 2:15 p.m. UTC | #1 
On Wed, 8 May 2019, Yinbo Zhu wrote:

> From: Suresh Gupta <B42813@freescale.com>
> 
> PHY_CLK_VALID bit for UTMI PHY in USBDR does not set even
> if PHY is providing valid clock. Workaround for this
> involves resetting of PHY and check PHY_CLK_VALID bit
> multiple times. If PHY_CLK_VALID bit is still not set even
> after 5 retries, it would be safe to deaclare that PHY
> clock is not available.
> This erratum is applicable for USBDR less then ver 2.4.
> 
> Signed-off-by: Suresh Gupta <B42813@freescale.com>
> Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
> ---
> Change in v5:
> 		remove dev_err function unnecessary parameters 
> 
>  drivers/usb/host/ehci-fsl.c |   37 ++++++++++++++++++++++++++-----------
>  drivers/usb/host/ehci-fsl.h |    3 +++
>  2 files changed, 29 insertions(+), 11 deletions(-)
> 
> diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> index 38674b7..1634ac8 100644
> --- a/drivers/usb/host/ehci-fsl.c
> +++ b/drivers/usb/host/ehci-fsl.c
> @@ -183,6 +183,17 @@ static int fsl_ehci_drv_probe(struct platform_device *pdev)
>  	return retval;
>  }
>  
> +static bool usb_phy_clk_valid(struct usb_hcd *hcd)
> +{
> +	void __iomem *non_ehci = hcd->regs;
> +	bool ret = true;
> +
> +	if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID))
> +		ret = false;
> +
> +	return ret;
> +}
> +
>  static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
>  			       enum fsl_usb2_phy_modes phy_mode,
>  			       unsigned int port_offset)
> @@ -226,6 +237,16 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
>  		/* fall through */
>  	case FSL_USB2_PHY_UTMI:
>  	case FSL_USB2_PHY_UTMI_DUAL:
> +		/* PHY_CLK_VALID bit is de-featured from all controller
> +		 * versions below 2.4 and is to be checked only for
> +		 * internal UTMI phy
> +		 */
> +		if (pdata->controller_ver > FSL_USB_VER_2_4 &&
> +		    pdata->have_sysif_regs && !usb_phy_clk_valid(hcd)) {
> +			dev_err(dev, "USB PHY clock invalid\n");
> +			return -EINVAL;
> +		}
> +
>  		if (pdata->have_sysif_regs && pdata->controller_ver) {
>  			/* controller version 1.6 or above */
>  			tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL);
> @@ -249,17 +270,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
>  		break;
>  	}
>  
> -	/*
> -	 * check PHY_CLK_VALID to determine phy clock presence before writing
> -	 * to portsc
> -	 */
> -	if (pdata->check_phy_clk_valid) {
> -		if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) &
> -		    PHY_CLK_VALID)) {
> -			dev_warn(hcd->self.controller,
> -				 "USB PHY clock invalid\n");
> -			return -EINVAL;
> -		}
> +	if (pdata->have_sysif_regs &&
> +	    pdata->controller_ver > FSL_USB_VER_1_6 &&
> +		!usb_phy_clk_valid(hcd)) {

This is still wrong.  The line above should be indented four characters 
less than it is: the '!' should line up with the 'p' in the line above 
it.

Alan Stern

> +		dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
> +		return -EINVAL;
>  	}
>  
>  	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
> diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
> index cbc4220..9d18c6e 100644
> --- a/drivers/usb/host/ehci-fsl.h
> +++ b/drivers/usb/host/ehci-fsl.h
> @@ -50,4 +50,7 @@
>  #define UTMI_PHY_EN             (1<<9)
>  #define ULPI_PHY_CLK_SEL        (1<<10)
>  #define PHY_CLK_VALID		(1<<17)
> +
> +/* Retry count for checking UTMI PHY CLK validity */
> +#define UTMI_PHY_CLK_VALID_CHK_RETRY 5
>  #endif				/* _EHCI_FSL_H */
>
Yinbo Zhu May 9, 2019, 3:54 a.m. UTC | #2 
> -----Original Message-----
> From: Alan Stern [mailto:stern@rowland.harvard.edu]
> Sent: 2019年5月8日 22:15
> To: Yinbo Zhu <yinbo.zhu@nxp.com>
> Cc: Xiaobo Xie <xiaobo.xie@nxp.com>; Greg Kroah-Hartman
> <gregkh@linuxfoundation.org>; Ramneek Mehresh
> <ramneek.mehresh@freescale.com>; Nikhil Badola
> <nikhil.badola@freescale.com>; Ran Wang <ran.wang_1@nxp.com>;
> linux-usb@vger.kernel.org; linux-kernel@vger.kernel.org; Jiafei Pan
> <jiafei.pan@nxp.com>; Suresh Gupta <B42813@freescale.com>
> Subject: [EXT] Re: [PATCH v5 2/5] usb: phy: Workaround for USB
> erratum-A005728
> 
> Caution: EXT Email
> 
> On Wed, 8 May 2019, Yinbo Zhu wrote:
> 
> > From: Suresh Gupta <B42813@freescale.com>
> >
> > PHY_CLK_VALID bit for UTMI PHY in USBDR does not set even if PHY is
> > providing valid clock. Workaround for this involves resetting of PHY
> > and check PHY_CLK_VALID bit multiple times. If PHY_CLK_VALID bit is
> > still not set even after 5 retries, it would be safe to deaclare that
> > PHY clock is not available.
> > This erratum is applicable for USBDR less then ver 2.4.
> >
> > Signed-off-by: Suresh Gupta <B42813@freescale.com>
> > Signed-off-by: Yinbo Zhu <yinbo.zhu@nxp.com>
> > ---
> > Change in v5:
> >               remove dev_err function unnecessary parameters
> >
> >  drivers/usb/host/ehci-fsl.c |   37 ++++++++++++++++++++++++++-----------
> >  drivers/usb/host/ehci-fsl.h |    3 +++
> >  2 files changed, 29 insertions(+), 11 deletions(-)
> >
> > diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
> > index 38674b7..1634ac8 100644
> > --- a/drivers/usb/host/ehci-fsl.c
> > +++ b/drivers/usb/host/ehci-fsl.c
> > @@ -183,6 +183,17 @@ static int fsl_ehci_drv_probe(struct platform_device
> *pdev)
> >       return retval;
> >  }
> >
> > +static bool usb_phy_clk_valid(struct usb_hcd *hcd) {
> > +     void __iomem *non_ehci = hcd->regs;
> > +     bool ret = true;
> > +
> > +     if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID))
> > +             ret = false;
> > +
> > +     return ret;
> > +}
> > +
> >  static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> >                              enum fsl_usb2_phy_modes phy_mode,
> >                              unsigned int port_offset) @@ -226,6
> > +237,16 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> >               /* fall through */
> >       case FSL_USB2_PHY_UTMI:
> >       case FSL_USB2_PHY_UTMI_DUAL:
> > +             /* PHY_CLK_VALID bit is de-featured from all controller
> > +              * versions below 2.4 and is to be checked only for
> > +              * internal UTMI phy
> > +              */
> > +             if (pdata->controller_ver > FSL_USB_VER_2_4 &&
> > +                 pdata->have_sysif_regs && !usb_phy_clk_valid(hcd)) {
> > +                     dev_err(dev, "USB PHY clock invalid\n");
> > +                     return -EINVAL;
> > +             }
> > +
> >               if (pdata->have_sysif_regs && pdata->controller_ver) {
> >                       /* controller version 1.6 or above */
> >                       tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL);
> > @@ -249,17 +270,11 @@ static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
> >               break;
> >       }
> >
> > -     /*
> > -      * check PHY_CLK_VALID to determine phy clock presence before writing
> > -      * to portsc
> > -      */
> > -     if (pdata->check_phy_clk_valid) {
> > -             if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) &
> > -                 PHY_CLK_VALID)) {
> > -                     dev_warn(hcd->self.controller,
> > -                              "USB PHY clock invalid\n");
> > -                     return -EINVAL;
> > -             }
> > +     if (pdata->have_sysif_regs &&
> > +         pdata->controller_ver > FSL_USB_VER_1_6 &&
> > +             !usb_phy_clk_valid(hcd)) {
> 
> This is still wrong.  The line above should be indented four characters less than it
> is: the '!' should line up with the 'p' in the line above it.
> 
> Alan Stern
Hi Alan Stern,

Your meaning is that as following changes?
 +     if (pdata->have_sysif_regs &&
 +         pdata->controller_ver > FSL_USB_VER_1_6 &&
 +         !usb_phy_clk_valid(hcd)) {

Regards,
Yinbo
> 
> > +             dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
> > +             return -EINVAL;
> >       }
> >
> >       ehci_writel(ehci, portsc,
> > &ehci->regs->port_status[port_offset]);
> > diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
> > index cbc4220..9d18c6e 100644
> > --- a/drivers/usb/host/ehci-fsl.h
> > +++ b/drivers/usb/host/ehci-fsl.h
> > @@ -50,4 +50,7 @@
> >  #define UTMI_PHY_EN             (1<<9)
> >  #define ULPI_PHY_CLK_SEL        (1<<10)
> >  #define PHY_CLK_VALID                (1<<17)
> > +
> > +/* Retry count for checking UTMI PHY CLK validity */ #define
> > +UTMI_PHY_CLK_VALID_CHK_RETRY 5
> >  #endif                               /* _EHCI_FSL_H */
> >
diff mbox series

Patch

diff --git a/drivers/usb/host/ehci-fsl.c b/drivers/usb/host/ehci-fsl.c
index 38674b7..1634ac8 100644
--- a/drivers/usb/host/ehci-fsl.c
+++ b/drivers/usb/host/ehci-fsl.c
@@ -183,6 +183,17 @@  static int fsl_ehci_drv_probe(struct platform_device *pdev)
 	return retval;
 }
 
+static bool usb_phy_clk_valid(struct usb_hcd *hcd)
+{
+	void __iomem *non_ehci = hcd->regs;
+	bool ret = true;
+
+	if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) & PHY_CLK_VALID))
+		ret = false;
+
+	return ret;
+}
+
 static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 			       enum fsl_usb2_phy_modes phy_mode,
 			       unsigned int port_offset)
@@ -226,6 +237,16 @@  static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 		/* fall through */
 	case FSL_USB2_PHY_UTMI:
 	case FSL_USB2_PHY_UTMI_DUAL:
+		/* PHY_CLK_VALID bit is de-featured from all controller
+		 * versions below 2.4 and is to be checked only for
+		 * internal UTMI phy
+		 */
+		if (pdata->controller_ver > FSL_USB_VER_2_4 &&
+		    pdata->have_sysif_regs && !usb_phy_clk_valid(hcd)) {
+			dev_err(dev, "USB PHY clock invalid\n");
+			return -EINVAL;
+		}
+
 		if (pdata->have_sysif_regs && pdata->controller_ver) {
 			/* controller version 1.6 or above */
 			tmp = ioread32be(non_ehci + FSL_SOC_USB_CTRL);
@@ -249,17 +270,11 @@  static int ehci_fsl_setup_phy(struct usb_hcd *hcd,
 		break;
 	}
 
-	/*
-	 * check PHY_CLK_VALID to determine phy clock presence before writing
-	 * to portsc
-	 */
-	if (pdata->check_phy_clk_valid) {
-		if (!(ioread32be(non_ehci + FSL_SOC_USB_CTRL) &
-		    PHY_CLK_VALID)) {
-			dev_warn(hcd->self.controller,
-				 "USB PHY clock invalid\n");
-			return -EINVAL;
-		}
+	if (pdata->have_sysif_regs &&
+	    pdata->controller_ver > FSL_USB_VER_1_6 &&
+		!usb_phy_clk_valid(hcd)) {
+		dev_warn(hcd->self.controller, "USB PHY clock invalid\n");
+		return -EINVAL;
 	}
 
 	ehci_writel(ehci, portsc, &ehci->regs->port_status[port_offset]);
diff --git a/drivers/usb/host/ehci-fsl.h b/drivers/usb/host/ehci-fsl.h
index cbc4220..9d18c6e 100644
--- a/drivers/usb/host/ehci-fsl.h
+++ b/drivers/usb/host/ehci-fsl.h
@@ -50,4 +50,7 @@ 
 #define UTMI_PHY_EN             (1<<9)
 #define ULPI_PHY_CLK_SEL        (1<<10)
 #define PHY_CLK_VALID		(1<<17)
+
+/* Retry count for checking UTMI PHY CLK validity */
+#define UTMI_PHY_CLK_VALID_CHK_RETRY 5
 #endif				/* _EHCI_FSL_H */