| Message ID | 20191125123210.1564323-4-thierry.reding@gmail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | usb: host: xhci-tegra: Implement basic ELPG support | expand |
On 25.11.2019 14.32, Thierry Reding wrote: > From: Thierry Reding <treding@nvidia.com> > > Do not use a fixed duration sleep to wait for the DMA controller to > become ready. Instead, poll the L2IMEMOP_RESULT register for the VLD > flag to determine when the XUSB controller's DMA master is ready. > > Based on work by JC Kuo <jckuo@nvidia.com>. > > Signed-off-by: Thierry Reding <treding@nvidia.com> > --- > drivers/usb/host/xhci-tegra.c | 19 ++++++++++++++++++- > 1 file changed, 18 insertions(+), 1 deletion(-) > > diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c > index 5cfd54862670..d15fd16168ae 100644 > --- a/drivers/usb/host/xhci-tegra.c > +++ b/drivers/usb/host/xhci-tegra.c > @@ -101,6 +101,8 @@ > #define L2IMEMOP_ACTION_SHIFT 24 > #define L2IMEMOP_INVALIDATE_ALL (0x40 << L2IMEMOP_ACTION_SHIFT) > #define L2IMEMOP_LOAD_LOCKED_RESULT (0x11 << L2IMEMOP_ACTION_SHIFT) > +#define XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT 0x101a18 > +#define L2IMEMOP_RESULT_VLD BIT(31) > #define XUSB_CSB_MP_APMAP 0x10181c > #define APMAP_BOOTPATH BIT(31) > > @@ -893,7 +895,22 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) > > csb_writel(tegra, 0, XUSB_FALC_DMACTL); > > - msleep(50); > + /* wait for RESULT_VLD to get set */ > + timeout = jiffies + msecs_to_jiffies(10); > + > + do { > + value = csb_readl(tegra, XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT); > + if (value & L2IMEMOP_RESULT_VLD) > + break; > + > + usleep_range(50, 100); > + } while (time_is_after_jiffies(timeout)); > + > + value = csb_readl(tegra, XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT); > + if ((value & L2IMEMOP_RESULT_VLD) == 0) { > + dev_err(dev, "DMA controller not ready %#010x\n", value); > + return -EBUSY; > + } > > csb_writel(tegra, le32_to_cpu(header->boot_codetag), > XUSB_FALC_BOOTVEC); > readx_poll_timeout? I think you can define a local macro to "curry" the 'tegra' argument to csb_readl.. #define tegra_csb_readl(x) csb_readl(tegra, x) readx_poll_timeout(tegra_csb_readl, ...) Cheers, Mikko
diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 5cfd54862670..d15fd16168ae 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -101,6 +101,8 @@ #define L2IMEMOP_ACTION_SHIFT 24 #define L2IMEMOP_INVALIDATE_ALL (0x40 << L2IMEMOP_ACTION_SHIFT) #define L2IMEMOP_LOAD_LOCKED_RESULT (0x11 << L2IMEMOP_ACTION_SHIFT) +#define XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT 0x101a18 +#define L2IMEMOP_RESULT_VLD BIT(31) #define XUSB_CSB_MP_APMAP 0x10181c #define APMAP_BOOTPATH BIT(31) @@ -893,7 +895,22 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) csb_writel(tegra, 0, XUSB_FALC_DMACTL); - msleep(50); + /* wait for RESULT_VLD to get set */ + timeout = jiffies + msecs_to_jiffies(10); + + do { + value = csb_readl(tegra, XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT); + if (value & L2IMEMOP_RESULT_VLD) + break; + + usleep_range(50, 100); + } while (time_is_after_jiffies(timeout)); + + value = csb_readl(tegra, XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT); + if ((value & L2IMEMOP_RESULT_VLD) == 0) { + dev_err(dev, "DMA controller not ready %#010x\n", value); + return -EBUSY; + } csb_writel(tegra, le32_to_cpu(header->boot_codetag), XUSB_FALC_BOOTVEC);