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[217.229.24.237]) by smtp.gmail.com with ESMTPSA id w13sm10160668wrm.8.2019.11.25.04.32.17 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 25 Nov 2019 04:32:17 -0800 (PST) From: Thierry Reding To: Mathias Nyman , Greg Kroah-Hartman Cc: Jon Hunter , JC Kuo , Nagarjuna Kristam , Sowjanya Komatineni , linux-usb@vger.kernel.org, linux-tegra@vger.kernel.org Subject: [PATCH 03/10] usb: host: xhci-tegra: Avoid a fixed duration sleep Date: Mon, 25 Nov 2019 13:32:03 +0100 Message-Id: <20191125123210.1564323-4-thierry.reding@gmail.com> X-Mailer: git-send-email 2.23.0 In-Reply-To: <20191125123210.1564323-1-thierry.reding@gmail.com> References: <20191125123210.1564323-1-thierry.reding@gmail.com> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Thierry Reding Do not use a fixed duration sleep to wait for the DMA controller to become ready. Instead, poll the L2IMEMOP_RESULT register for the VLD flag to determine when the XUSB controller's DMA master is ready. Based on work by JC Kuo . Signed-off-by: Thierry Reding --- drivers/usb/host/xhci-tegra.c | 19 ++++++++++++++++++- 1 file changed, 18 insertions(+), 1 deletion(-) diff --git a/drivers/usb/host/xhci-tegra.c b/drivers/usb/host/xhci-tegra.c index 5cfd54862670..d15fd16168ae 100644 --- a/drivers/usb/host/xhci-tegra.c +++ b/drivers/usb/host/xhci-tegra.c @@ -101,6 +101,8 @@ #define L2IMEMOP_ACTION_SHIFT 24 #define L2IMEMOP_INVALIDATE_ALL (0x40 << L2IMEMOP_ACTION_SHIFT) #define L2IMEMOP_LOAD_LOCKED_RESULT (0x11 << L2IMEMOP_ACTION_SHIFT) +#define XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT 0x101a18 +#define L2IMEMOP_RESULT_VLD BIT(31) #define XUSB_CSB_MP_APMAP 0x10181c #define APMAP_BOOTPATH BIT(31) @@ -893,7 +895,22 @@ static int tegra_xusb_load_firmware(struct tegra_xusb *tegra) csb_writel(tegra, 0, XUSB_FALC_DMACTL); - msleep(50); + /* wait for RESULT_VLD to get set */ + timeout = jiffies + msecs_to_jiffies(10); + + do { + value = csb_readl(tegra, XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT); + if (value & L2IMEMOP_RESULT_VLD) + break; + + usleep_range(50, 100); + } while (time_is_after_jiffies(timeout)); + + value = csb_readl(tegra, XUSB_CSB_MEMPOOL_L2IMEMOP_RESULT); + if ((value & L2IMEMOP_RESULT_VLD) == 0) { + dev_err(dev, "DMA controller not ready %#010x\n", value); + return -EBUSY; + } csb_writel(tegra, le32_to_cpu(header->boot_codetag), XUSB_FALC_BOOTVEC);