From patchwork Wed Dec 11 01:54:42 2019 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Min Guo X-Patchwork-Id: 11283675 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id AF0AD109A for ; Wed, 11 Dec 2019 01:55:06 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 8518720838 for ; Wed, 11 Dec 2019 01:55:06 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="dX8TOOra" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727119AbfLKBzD (ORCPT ); Tue, 10 Dec 2019 20:55:03 -0500 Received: from mailgw02.mediatek.com ([1.203.163.81]:57442 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726364AbfLKBzC (ORCPT ); Tue, 10 Dec 2019 20:55:02 -0500 X-UUID: 22224e4927864e1cbfe5f70f261418e9-20191211 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=lAQh/3jyq3mvyY+gOwkzOpTAME8Gd1I+NZkj+CC0GEg=; b=dX8TOOraNVJ0QETa89HU0VjFLTfimmzy2R8Os2o11JrlTDBxEv4LfyQimBIw+xbu46JqAgAT815kJCxjLVSpj3s85m1398sF1EXgP3KXFDLn/D+6kY2yH1h0Oz/m8I1AQrjQt1zaCPszqYjtV8nb5PghDRklba6R4Kw0p5XuRRY=; X-UUID: 22224e4927864e1cbfe5f70f261418e9-20191211 Received: from mtkcas35.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLS) with ESMTP id 1094991122; Wed, 11 Dec 2019 09:54:56 +0800 Received: from mtkcas09.mediatek.inc (172.21.101.178) by MTKMBS31N2.mediatek.inc (172.27.4.87) with Microsoft SMTP Server (TLS) id 15.0.1395.4; Wed, 11 Dec 2019 09:53:58 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas09.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1395.4 via Frontend Transport; Wed, 11 Dec 2019 09:54:49 +0800 From: To: Bin Liu , Rob Herring CC: Greg Kroah-Hartman , Mark Rutland , Matthias Brugger , Alan Stern , , , , , , , , , Min Guo Subject: [PATCH v9 2/6] arm: dts: mt2701: Add usb2 device nodes Date: Wed, 11 Dec 2019 09:54:42 +0800 Message-ID: <20191211015446.11477-3-min.guo@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20191211015446.11477-1-min.guo@mediatek.com> References: <20191211015446.11477-1-min.guo@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: FC16D426DBA9743DC58F80509F27FDF9172F803E31924DF38809DE3A7882573C2000:8 X-MTK: N Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Min Guo Add musb nodes and usb2 phy nodes for MT2701 Signed-off-by: Min Guo --- changes in v9: 1. Add usb-role-switch 2. Remove label of usb connector child node 3. Change usb connector child node compatible as "gpio-usb-b-connector", "usb-b-connector"; changes in v8: 1. no changes changes in v7: 1. Change usb connector child node compatible as "gpio-usb-b-connector" changes in v6: 1. Modify usb connector child node changes in v5: 1. Add usb connector child node changes in v4: 1. no changes changes in v3: 1. no changes changes in v2: 1. Remove phy-names --- arch/arm/boot/dts/mt2701-evb.dts | 21 ++++++++++++++++++++ arch/arm/boot/dts/mt2701.dtsi | 33 ++++++++++++++++++++++++++++++++ 2 files changed, 54 insertions(+) diff --git a/arch/arm/boot/dts/mt2701-evb.dts b/arch/arm/boot/dts/mt2701-evb.dts index be0edb3dae6c..844ed3f971fe 100644 --- a/arch/arm/boot/dts/mt2701-evb.dts +++ b/arch/arm/boot/dts/mt2701-evb.dts @@ -6,6 +6,7 @@ */ /dts-v1/; +#include #include "mt2701.dtsi" / { @@ -60,6 +61,15 @@ backlight_lcd: backlight_lcd { >; default-brightness-level = <9>; }; + + usb_vbus: regulator@0 { + compatible = "regulator-fixed"; + regulator-name = "usb_vbus"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + gpio = <&pio 45 GPIO_ACTIVE_HIGH>; + enable-active-high; + }; }; &auxadc { @@ -229,3 +239,14 @@ pins1 { &uart0 { status = "okay"; }; + +&usb2 { + status = "okay"; + usb-role-switch; + connector{ + compatible = "gpio-usb-b-connector", "usb-b-connector"; + type = "micro"; + id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>; + vbus-supply = <&usb_vbus>; + }; +}; diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi index 180377e56ef4..a6b1434e83fb 100644 --- a/arch/arm/boot/dts/mt2701.dtsi +++ b/arch/arm/boot/dts/mt2701.dtsi @@ -670,6 +670,39 @@ u3port1: usb-phy@1a244900 { }; }; + usb2: usb@11200000 { + compatible = "mediatek,mt2701-musb", + "mediatek,mtk-musb"; + reg = <0 0x11200000 0 0x1000>; + interrupts = ; + interrupt-names = "mc"; + phys = <&u2port2 PHY_TYPE_USB2>; + dr_mode = "otg"; + clocks = <&pericfg CLK_PERI_USB0>, + <&pericfg CLK_PERI_USB0_MCU>, + <&pericfg CLK_PERI_USB_SLV>; + clock-names = "main","mcu","univpll"; + power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; + status = "disabled"; + }; + + u2phy0: usb-phy@11210000 { + compatible = "mediatek,generic-tphy-v1"; + reg = <0 0x11210000 0 0x0800>; + #address-cells = <2>; + #size-cells = <2>; + ranges; + status = "okay"; + + u2port2: usb-phy@1a1c4800 { + reg = <0 0x11210800 0 0x0100>; + clocks = <&topckgen CLK_TOP_USB_PHY48M>; + clock-names = "ref"; + #phy-cells = <1>; + status = "okay"; + }; + }; + ethsys: syscon@1b000000 { compatible = "mediatek,mt2701-ethsys", "syscon"; reg = <0 0x1b000000 0 0x1000>;