From patchwork Tue Mar 3 17:11:54 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bryan O'Donoghue X-Patchwork-Id: 11418503 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id A624B14B7 for ; Tue, 3 Mar 2020 17:12:43 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 7C2AC2166E for ; Tue, 3 Mar 2020 17:12:43 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (2048-bit key) header.d=linaro.org header.i=@linaro.org header.b="O4Z5cHiK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730785AbgCCRMm (ORCPT ); Tue, 3 Mar 2020 12:12:42 -0500 Received: from mail-wm1-f68.google.com ([209.85.128.68]:37356 "EHLO mail-wm1-f68.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1730696AbgCCRMK (ORCPT ); Tue, 3 Mar 2020 12:12:10 -0500 Received: by mail-wm1-f68.google.com with SMTP id a141so3659879wme.2 for ; Tue, 03 Mar 2020 09:12:09 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=ZPPGYFMns8Eb0BtCoPm4VW2OpZkSSM3j58axdU/IfuM=; b=O4Z5cHiKkmQ+bOXomT4Adnlla/zpvUnnHKnHRiJnc6HZTMgS+s64KjrD0M8dizGJqV j5txUXYCbMwC0ewUXeOU5rWc01TJ7Z8aOaq9k7AgqTX3dHGJKl+nDI+Px+zmfLUB93No 6V+FPk3IlLwU1Tb93BqMY4eEMPQo5dCK5sNPvJc4VKvhWklHRc4atynyw4dhv+F59rBZ d1FSUMwEv4u2WY6HmyTgBuQSHVeka0aHAFnx5+Rlszhgb043lefR5OG3GQVKubNVOvd2 JiekvG3L/Q5JTPWwm5DQimOsM3kCC+Zwy7HRWvzEFFfZgBx3w5x3vk3+WDZ9qzoE1jux bSPw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references:mime-version:content-transfer-encoding; bh=ZPPGYFMns8Eb0BtCoPm4VW2OpZkSSM3j58axdU/IfuM=; b=KiqIx5WbHm6LBxMCWQSKeUazyT5lawN/CVULpG+zG+EDHTDj9sh4RXk+o0rdvQl3Dq GOqfu29vhTJqXU8YODd7HlMvYEmk2AVctJIzpnL2HY9F9lD9s0mv1ctsA2fssYm/cCT8 svRJfmcpcQP1v+2UUjWCWTvo6MSqGVA6fweqDnuAHAOlHFQpwZaDVDpMSpcTvJpdFhEd YerFeuYKYdoYY+mn5WG96yaLpcFOr1JiuSUWOcgq3/seOXcTcTupKYz/XWFdqLnR+TtQ 6EWDtpQVbJbPm7+QIVcE62OE3b05OVgzrFpJjDIm2u5ZF9dmddZs/pZWPU2jfyizDOyr 4LWQ== X-Gm-Message-State: ANhLgQ2BwEZxUqK2BsjHUe8isAz9ZWvg6JbF3mSs5LuBYZiadeB5/roQ zIQRB8/F1omqu/6G+kepGZTrJA== X-Google-Smtp-Source: ADFU+vuwH+JcmOTaQLUODIvWjX4q6nDSP8HAuS2wT0wkvezVz/0ZPyUMB33aF5CDrTBv/59NuT/y7A== X-Received: by 2002:a05:600c:230d:: with SMTP id 13mr5133837wmo.11.1583255528580; Tue, 03 Mar 2020 09:12:08 -0800 (PST) Received: from localhost.localdomain ([176.61.57.127]) by smtp.gmail.com with ESMTPSA id z13sm5425319wrw.88.2020.03.03.09.12.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 03 Mar 2020 09:12:07 -0800 (PST) From: Bryan O'Donoghue To: linux-arm-msm@vger.kernel.org, linux-usb@vger.kernel.org, gregkh@linuxfoundation.org, jackp@codeaurora.org, balbi@kernel.org, bjorn.andersson@linaro.org, robh@kernel.org Cc: linux-kernel@vger.kernel.org, Vinod Koul , Shawn Guo , Andy Gross , Rob Herring , Mark Rutland , devicetree@vger.kernel.org, Bryan O'Donoghue Subject: [PATCH v7 13/18] arm64: dts: qcom: qcs404: Add USB devices and PHYs Date: Tue, 3 Mar 2020 17:11:54 +0000 Message-Id: <20200303171159.246992-14-bryan.odonoghue@linaro.org> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200303171159.246992-1-bryan.odonoghue@linaro.org> References: <20200303171159.246992-1-bryan.odonoghue@linaro.org> MIME-Version: 1.0 Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Bjorn Andersson QCS404 sports HS and SS USB controllers based on dwc3 block with two HS PHYs and one SS PHY. Add nodes for these devices and enable them for EVB board. Signed-off-by: Bjorn Andersson Signed-off-by: Vinod Koul Signed-off-by: Shawn Guo Cc: Andy Gross Cc: Rob Herring Cc: Mark Rutland Cc: linux-arm-msm@vger.kernel.org Cc: devicetree@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Bryan O'Donoghue --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 100 +++++++++++++++++++++++++++ 1 file changed, 100 insertions(+) diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index 4ee1e3d5f123..d3347ce2b94f 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -323,6 +323,48 @@ rpm_msg_ram: memory@60000 { reg = <0x00060000 0x6000>; }; + usb3_phy: phy@78000 { + compatible = "qcom,usb-ss-28nm-phy"; + reg = <0x00078000 0x400>; + #phy-cells = <0>; + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB3_PHY_PIPE_CLK>; + clock-names = "ref", "ahb", "pipe"; + resets = <&gcc GCC_USB3_PHY_BCR>, + <&gcc GCC_USB3PHY_PHY_BCR>; + reset-names = "com", "phy"; + status = "disabled"; + }; + + usb2_phy_prim: phy@7a000 { + compatible = "qcom,usb-hs-28nm-femtophy"; + reg = <0x0007a000 0x200>; + #phy-cells = <0>; + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "ahb", "sleep"; + resets = <&gcc GCC_USB_HS_PHY_CFG_AHB_BCR>, + <&gcc GCC_USB2A_PHY_BCR>; + reset-names = "phy", "por"; + status = "disabled"; + }; + + usb2_phy_sec: phy@7c000 { + compatible = "qcom,usb-hs-28nm-femtophy"; + reg = <0x0007c000 0x200>; + #phy-cells = <0>; + clocks = <&rpmcc RPM_SMD_LN_BB_CLK>, + <&gcc GCC_USB_HS_PHY_CFG_AHB_CLK>, + <&gcc GCC_USB2A_PHY_SLEEP_CLK>; + clock-names = "ref", "ahb", "sleep"; + resets = <&gcc GCC_QUSB2_PHY_BCR>, + <&gcc GCC_USB2_HS_PHY_ONLY_BCR>; + reset-names = "phy", "por"; + status = "disabled"; + }; + qfprom: qfprom@a4000 { compatible = "qcom,qfprom"; reg = <0x000a4000 0x1000>; @@ -486,6 +528,64 @@ glink-edge { }; }; + usb3: usb@7678800 { + compatible = "qcom,dwc3"; + reg = <0x07678800 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&gcc GCC_USB30_MASTER_CLK>, + <&gcc GCC_SYS_NOC_USB3_CLK>, + <&gcc GCC_USB30_SLEEP_CLK>, + <&gcc GCC_USB30_MOCK_UTMI_CLK>; + clock-names = "core", "iface", "sleep", "mock_utmi"; + assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>, + <&gcc GCC_USB30_MASTER_CLK>; + assigned-clock-rates = <19200000>, <200000000>; + status = "disabled"; + + dwc3@7580000 { + compatible = "snps,dwc3"; + reg = <0x07580000 0xcd00>; + interrupts = ; + phys = <&usb2_phy_sec>, <&usb3_phy>; + phy-names = "usb2-phy", "usb3-phy"; + snps,has-lpm-erratum; + snps,hird-threshold = /bits/ 8 <0x10>; + snps,usb3_lpm_capable; + dr_mode = "otg"; + }; + }; + + usb2: usb@79b8800 { + compatible = "qcom,dwc3"; + reg = <0x079b8800 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges; + clocks = <&gcc GCC_USB_HS_SYSTEM_CLK>, + <&gcc GCC_PCNOC_USB2_CLK>, + <&gcc GCC_USB_HS_INACTIVITY_TIMERS_CLK>, + <&gcc GCC_USB20_MOCK_UTMI_CLK>; + clock-names = "core", "iface", "sleep", "mock_utmi"; + assigned-clocks = <&gcc GCC_USB20_MOCK_UTMI_CLK>, + <&gcc GCC_USB_HS_SYSTEM_CLK>; + assigned-clock-rates = <19200000>, <133333333>; + status = "disabled"; + + dwc3@78c0000 { + compatible = "snps,dwc3"; + reg = <0x078c0000 0xcc00>; + interrupts = ; + phys = <&usb2_phy_prim>; + phy-names = "usb2-phy"; + snps,has-lpm-erratum; + snps,hird-threshold = /bits/ 8 <0x10>; + snps,usb3_lpm_capable; + dr_mode = "peripheral"; + }; + }; + tlmm: pinctrl@1000000 { compatible = "qcom,qcs404-pinctrl"; reg = <0x01000000 0x200000>,