From patchwork Tue Aug 4 17:48:24 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Biju Das X-Patchwork-Id: 11700771 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 0B1AD138A for ; Tue, 4 Aug 2020 17:48:46 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 1055A20842 for ; Tue, 4 Aug 2020 17:48:46 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728655AbgHDRsp (ORCPT ); Tue, 4 Aug 2020 13:48:45 -0400 Received: from relmlor1.renesas.com ([210.160.252.171]:1260 "EHLO relmlie5.idc.renesas.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1729871AbgHDRsk (ORCPT ); Tue, 4 Aug 2020 13:48:40 -0400 X-IronPort-AV: E=Sophos;i="5.75,434,1589209200"; d="scan'208";a="53862809" Received: from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152]) by relmlie5.idc.renesas.com with ESMTP; 05 Aug 2020 02:48:37 +0900 Received: from localhost.localdomain (unknown [172.29.52.222]) by relmlir6.idc.renesas.com (Postfix) with ESMTP id 9DCCF40B92DF; Wed, 5 Aug 2020 02:48:34 +0900 (JST) From: Biju Das To: Rob Herring , Greg Kroah-Hartman Cc: Lad Prabhakar , Yoshihiro Shimoda , Heikki Krogerus , linux-usb@vger.kernel.org, devicetree@vger.kernel.org, Geert Uytterhoeven , Chris Paterson , Biju Das , linux-renesas-soc@vger.kernel.org, Biju Das Subject: [PATCH 1/5] dt-bindings: usb: convert ti,hd3ss3220 bindings to json-schema Date: Tue, 4 Aug 2020 18:48:24 +0100 Message-Id: <20200804174828.8339-2-biju.das.jz@bp.renesas.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200804174828.8339-1-biju.das.jz@bp.renesas.com> References: <20200804174828.8339-1-biju.das.jz@bp.renesas.com> Sender: linux-usb-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org From: Lad Prabhakar Convert ti,hd3ss3220.txt to YAML. Updated the binding documentation as graph bindings of this device model Super Speed (SS) data bus to the Super Speed (SS) capable connector. Signed-off-by: Lad Prabhakar Signed-off-by: Biju Das --- Ref: https://patchwork.kernel.org/patch/11669423/ --- .../devicetree/bindings/usb/ti,hd3ss3220.txt | 38 --------- .../devicetree/bindings/usb/ti,hd3ss3220.yaml | 81 +++++++++++++++++++ 2 files changed, 81 insertions(+), 38 deletions(-) delete mode 100644 Documentation/devicetree/bindings/usb/ti,hd3ss3220.txt create mode 100644 Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml diff --git a/Documentation/devicetree/bindings/usb/ti,hd3ss3220.txt b/Documentation/devicetree/bindings/usb/ti,hd3ss3220.txt deleted file mode 100644 index 2bd21b22ce95..000000000000 --- a/Documentation/devicetree/bindings/usb/ti,hd3ss3220.txt +++ /dev/null @@ -1,38 +0,0 @@ -TI HD3SS3220 TypeC DRP Port Controller. - -Required properties: - - compatible: Must be "ti,hd3ss3220". - - reg: I2C slave address, must be 0x47 or 0x67 based on ADDR pin. - - interrupts: An interrupt specifier. - -Required sub-node: - - connector: The "usb-c-connector" attached to the hd3ss3220 chip. The - bindings of the connector node are specified in: - - Documentation/devicetree/bindings/connector/usb-connector.yaml - -Example: -hd3ss3220@47 { - compatible = "ti,hd3ss3220"; - reg = <0x47>; - interrupt-parent = <&gpio6>; - interrupts = <3 IRQ_TYPE_LEVEL_LOW>; - - connector { - compatible = "usb-c-connector"; - label = "USB-C"; - data-role = "dual"; - - ports { - #address-cells = <1>; - #size-cells = <0>; - - port@1 { - reg = <1>; - hd3ss3220_ep: endpoint { - remote-endpoint = <&usb3_role_switch>; - }; - }; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml b/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml new file mode 100644 index 000000000000..5c7c7d782a04 --- /dev/null +++ b/Documentation/devicetree/bindings/usb/ti,hd3ss3220.yaml @@ -0,0 +1,81 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/ti,hd3ss3220.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: TI HD3SS3220 TypeC DRP Port Controller + +maintainers: + - Biju Das + +description: |- + HD3SS3220 is a USB SuperSpeed (SS) 2:1 mux with DRP port controller. The device provides Channel + Configuration (CC) logic and 5V VCONN sourcing for ecosystems implementing USB Type-C. The + HD3SS3220 can be configured as a Downstream Facing Port (DFP), Upstream Facing Port (UFP) or a + Dual Role Port (DRP) making it ideal for any application. + +properties: + compatible: + const: ti,hd3ss3220 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + ports: + description: OF graph bindings (specified in bindings/graph.txt) that model + SS data bus to the SS capable connector. + type: object + properties: + port@0: + type: object + description: Super Speed (SS) capable connector. + + port@1: + type: object + description: Super Speed (SS) data bus. + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - interrupts + +additionalProperties: false + +examples: + - | + i2c0 { + #address-cells = <1>; + #size-cells = <0>; + + hd3ss3220@47 { + compatible = "ti,hd3ss3220"; + reg = <0x47>; + interrupt-parent = <&gpio6>; + interrupts = <3>; + + ports { + #address-cells = <1>; + #size-cells = <0>; + port@0 { + reg = <0>; + hd3ss3220_in_ep: endpoint { + remote-endpoint = <&ss_ep>; + }; + }; + port@1 { + reg = <1>; + hd3ss3220_out_ep: endpoint { + remote-endpoint = <&usb3_role_switch>; + }; + }; + }; + }; + };