From patchwork Sat Jan 16 09:06:44 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunfeng Yun X-Patchwork-Id: 12024711 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MIME_BASE64_TEXT,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id B1B78C4332D for ; Sat, 16 Jan 2021 09:09:18 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 87EED23A59 for ; Sat, 16 Jan 2021 09:09:18 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727416AbhAPJJI (ORCPT ); Sat, 16 Jan 2021 04:09:08 -0500 Received: from Mailgw01.mediatek.com ([1.203.163.78]:40255 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726335AbhAPJHv (ORCPT ); Sat, 16 Jan 2021 04:07:51 -0500 X-UUID: 5d99b24f2edf4ac2a138dc5046852fc0-20210116 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=G+OJnN7fDA/BpSOYjVKjCZxkMLdTgC3xWjZvIWrZOsk=; b=pHDDMdXWkSb3s9ywKTtXatolnEcbHvXhRpwk6XgrtNtbd1HnYvJHKGO8ZPymmqEy1+1e8dmK8KGKu8voJs5BLeu/20AcN+m6UYQcWKzgHwggxSKow0ePqArJ/ae9Wv32coBwG3ihT+gThhEYEh5ezEvMUfohUlYS1beUg8N5T+o=; X-UUID: 5d99b24f2edf4ac2a138dc5046852fc0-20210116 Received: from mtkcas36.mediatek.inc [(172.27.4.253)] by mailgw01.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1269323464; Sat, 16 Jan 2021 17:07:03 +0800 Received: from mtkcas11.mediatek.inc (172.21.101.40) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sat, 16 Jan 2021 17:06:58 +0800 Received: from mtkslt301.mediatek.inc (10.21.14.114) by mtkcas11.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sat, 16 Jan 2021 17:06:58 +0800 From: Chunfeng Yun To: Vinod Koul , Rob Herring , Greg Kroah-Hartman , Matthias Brugger CC: Chunfeng Yun , Kishon Vijay Abraham I , Chun-Kuang Hu , Philipp Zabel , Min Guo , , , , , Subject: [PATCH next 03/15] dt-bindings: phy: mediatek: dsi-phy: modify compatible dependence Date: Sat, 16 Jan 2021 17:06:44 +0800 Message-ID: <20210116090656.11752-3-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210116090656.11752-1-chunfeng.yun@mediatek.com> References: <20210116090656.11752-1-chunfeng.yun@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 2941C6C062B00D6A4C12F6AB8FC1907DA6D697F2F4234EBEDA9C467556CFAEAB2000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org The compatilbe "mediatek,mt7623-mipi-tx" is not supported in driver, and in fact uses "mediatek,mt2701-mipi-tx" instead on MT7623, so changes the compatible items to make dependence clear. And add an optional "clock-names" property, it's not used to get the clock, but some DTS files provide it. Cc: Chun-Kuang Hu Cc: Philipp Zabel Signed-off-by: Chunfeng Yun --- .../bindings/phy/mediatek,dsi-phy.yaml | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml index 71d4acea1f66..af6e554c5b69 100644 --- a/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml +++ b/Documentation/devicetree/bindings/phy/mediatek,dsi-phy.yaml @@ -19,11 +19,14 @@ properties: pattern: "^dsi-phy@[0-9a-f]+$" compatible: - enum: - - mediatek,mt2701-mipi-tx - - mediatek,mt7623-mipi-tx - - mediatek,mt8173-mipi-tx - - mediatek,mt8183-mipi-tx + oneOf: + - items: + - enum: + - mediatek,mt7623-mipi-tx + - const: mediatek,mt2701-mipi-tx + - const: mediatek,mt2701-mipi-tx + - const: mediatek,mt8173-mipi-tx + - const: mediatek,mt8183-mipi-tx reg: maxItems: 1 @@ -32,6 +35,10 @@ properties: items: - description: PLL reference clock + clock-names: + items: + - const: ref + clock-output-names: maxItems: 1