From patchwork Mon Mar 8 05:37:42 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Chunfeng Yun X-Patchwork-Id: 12121455 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-17.0 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_CR_TRAILER, INCLUDES_PATCH,MAILING_LIST_MULTI,MIME_BASE64_TEXT,SPF_HELO_NONE,SPF_PASS, UNPARSEABLE_RELAY,URIBL_BLOCKED,USER_AGENT_GIT autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 92E9EC1550B for ; Mon, 8 Mar 2021 05:38:54 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 80DCE65200 for ; Mon, 8 Mar 2021 05:38:54 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S234498AbhCHFiX (ORCPT ); Mon, 8 Mar 2021 00:38:23 -0500 Received: from mailgw02.mediatek.com ([1.203.163.81]:26064 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S234419AbhCHFiC (ORCPT ); Mon, 8 Mar 2021 00:38:02 -0500 X-UUID: b78ddf32959a43b3b2441d0c93471a78-20210308 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=xiK75etj9DmiKoQLrPrie0KN9SKOuWl4w4F5RiOHtYo=; b=BKqMmtbd/m15HcWyFtdIYxeSOFci1k0v6le3Fg1vzluyul8TyPUJ7jJvI8KmO1QM2xNDSZ+9JGMn+xkvmK2fVLYYISB2lrpmjC1/isYSmrkjoQJzWp5GWyUcKWF2Ks4Kmvn/c/3W6FjMeF1wzyGgkP0/h2M7fV9WDKS0AUovoLM=; X-UUID: b78ddf32959a43b3b2441d0c93471a78-20210308 Received: from mtkcas32.mediatek.inc [(172.27.4.253)] by mailgw02.mediatek.com (envelope-from ) (mailgw01.mediatek.com ESMTP with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1281030574; Mon, 08 Mar 2021 13:37:52 +0800 Received: from mtkcas07.mediatek.inc (172.21.101.84) by MTKMBS31N1.mediatek.inc (172.27.4.69) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Mon, 8 Mar 2021 13:37:51 +0800 Received: from mtkslt301.mediatek.inc (10.21.14.114) by mtkcas07.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Mon, 8 Mar 2021 13:37:50 +0800 From: Chunfeng Yun To: Vinod Koul , Rob Herring , Matthias Brugger CC: Chunfeng Yun , Kishon Vijay Abraham I , Greg Kroah-Hartman , Chun-Kuang Hu , Philipp Zabel , , , , , Subject: [PATCH v4 09/12] arm64: dts: mediatek: mt8183: fix dtbs_check warning Date: Mon, 8 Mar 2021 13:37:42 +0800 Message-ID: <20210308053745.25697-9-chunfeng.yun@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20210308053745.25697-1-chunfeng.yun@mediatek.com> References: <20210308053745.25697-1-chunfeng.yun@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: 322C98B94CE6078B86382F4B8B5AE479148476144B2D5EC7669AA5C533025DDA2000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-usb@vger.kernel.org Harmonize node names, compatibles and properties. Signed-off-by: Chunfeng Yun --- v4: no changes v3: remove property clock-names suggested by CK v2: no changes --- arch/arm64/boot/dts/mediatek/mt8183.dtsi | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/arch/arm64/boot/dts/mediatek/mt8183.dtsi b/arch/arm64/boot/dts/mediatek/mt8183.dtsi index 80519a145f13..8882d35ac6ab 100644 --- a/arch/arm64/boot/dts/mediatek/mt8183.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8183.dtsi @@ -880,7 +880,7 @@ ranges; status = "disabled"; - usb_host: xhci@11200000 { + usb_host: usb@11200000 { compatible = "mediatek,mt8183-xhci", "mediatek,mtk-xhci"; reg = <0 0x11200000 0 0x1000>; @@ -923,11 +923,10 @@ status = "disabled"; }; - mipi_tx0: mipi-dphy@11e50000 { + mipi_tx0: dsi-phy@11e50000 { compatible = "mediatek,mt8183-mipi-tx"; reg = <0 0x11e50000 0 0x1000>; clocks = <&apmixedsys CLK_APMIXED_MIPID0_26M>; - clock-names = "ref_clk"; #clock-cells = <0>; #phy-cells = <0>; clock-output-names = "mipi_tx0_pll"; @@ -946,11 +945,10 @@ }; }; - u3phy: usb-phy@11f40000 { + u3phy: t-phy@11f40000 { compatible = "mediatek,mt8183-tphy", "mediatek,generic-tphy-v2"; #address-cells = <1>; - #phy-cells = <1>; #size-cells = <1>; ranges = <0 0 0x11f40000 0x1000>; status = "okay";