| Message ID | 20220125161821.1951906-1-dinguyen@kernel.org (mailing list archive) |
|---|---|
| State | Accepted |
| Commit | 56f26f177b26de041edef245562b68eb857093fc |
| Headers | show |
| Series | [1/3] dt-bindings: usb: dwc2: add compatible "intel,socfpga-agilex-hsotg" | expand |
On Tue, 25 Jan 2022 10:18:19 -0600, Dinh Nguyen wrote: > Add the compatible "intel,socfpga-agilex-hsotg" to the DWC2 > implementation, because the Agilex DWC2 implementation does not support > clock gating. > > Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> > --- > Documentation/devicetree/bindings/usb/dwc2.yaml | 1 + > 1 file changed, 1 insertion(+) > Acked-by: Rob Herring <robh@kernel.org>
On Tue, Jan 25, 2022 at 10:18:19AM -0600, Dinh Nguyen wrote: > Add the compatible "intel,socfpga-agilex-hsotg" to the DWC2 > implementation, because the Agilex DWC2 implementation does not support > clock gating. > > Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> > --- > Documentation/devicetree/bindings/usb/dwc2.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml > index f00867ebc147..481aaa09f3f2 100644 > --- a/Documentation/devicetree/bindings/usb/dwc2.yaml > +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml > @@ -53,6 +53,7 @@ properties: > - const: st,stm32mp15-hsotg > - const: snps,dwc2 > - const: samsung,s3c6400-hsotg > + - const: intel,socfpga-agilex-hsotg This is confusing and wrong. Now the intel,socfpga-agilex-hsotg is mentioned twice - with and without snps,dwc2. The DTS change in this patchset added usage with snps,dwc2. The commit msg says it's different, but is the difference incompatible? Please clarify the AgileX HSOTG - is it compatible with snps,dwc2 or not? Based on this the patch might need to be reverted (or changed). Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/usb/dwc2.yaml b/Documentation/devicetree/bindings/usb/dwc2.yaml index f00867ebc147..481aaa09f3f2 100644 --- a/Documentation/devicetree/bindings/usb/dwc2.yaml +++ b/Documentation/devicetree/bindings/usb/dwc2.yaml @@ -53,6 +53,7 @@ properties: - const: st,stm32mp15-hsotg - const: snps,dwc2 - const: samsung,s3c6400-hsotg + - const: intel,socfpga-agilex-hsotg reg: maxItems: 1
Add the compatible "intel,socfpga-agilex-hsotg" to the DWC2 implementation, because the Agilex DWC2 implementation does not support clock gating. Signed-off-by: Dinh Nguyen <dinguyen@kernel.org> --- Documentation/devicetree/bindings/usb/dwc2.yaml | 1 + 1 file changed, 1 insertion(+)